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Hello, I would like to service a McBSP with EDMA. The situation is this: I have a daughtercard for a C6713DSK wich has a multiple channel DAC. The McBSP0 is used as the interface between the DAC and the CPU. I want to control 4 channels on the DAC, this means I have to send 4 16bit values to the McBSP (12bit value + 4bit channelnumber). A timer is used to generate a pulse wich signals the DAC to start converting (the 4 channels simultaneously). After this pulse, I can start writing new information to the DAC. At the moment I service the DAC using two ISRs. One ISR is triggered by the timer that also generates the 'start conversion' pulse. This ISR writes the first of 4 values to the DAC. To avoid overwriting of the Data Transmit Register (DXR), I have to wait for a transmit interrupt from the McBSP. This interrupt triggers a second ISR that transfers the second value and keeps a counter. Upon the next transmit interrupt from the McBSP, the third value is sent... When the counter reaches 4, the ISR detects that no more values need to be written and the sequence stops. This works fine, but it generates a lot of overhead due to all the context switches. Especially because the ISRs are witten in C (I don't know C6x assembly). What I wanted to do is use the EDMA to service the McBSP to get rid of all the overhead. But my problem is as follows: The timer is generating the pace at witch _4_ values need to be transferred to the McBSP (timer event should trigger a 4 value transfer). But these 4 values need to be transferred to the DXR at the pace of the McBSP (transmit event should trigger a transfer of one of the 4 values) to prevent the DXR to be overwritten. Is this possible with the EDMA? How can I do this? Suppose I do a frame synchronised transfer of the 4 values to the McBSP, will the EDMA make sure that the DXR is not overwritten? Thanks, Jan |
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Servicing McBSP with EDMA
Started by ●March 22, 2004
Reply by ●March 25, 20042004-03-25
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Hi Jan,
I think the plan of action you've describe in
the last two paragraphs of your email should work. The EDMA will not over
run the DXR because it is actually paced by the transfer of the bits from the
DXR, when a transmit is completed by DXR then that event triggers the
next EDMA transfer of the next 16-bit word. So, the
sequence of events, as I see it, first you get an interrupt from
the timer and generate the pulse to the DAC, then you setup the EDMA to do a 4
16-bit word transfer to the Mcbsp0. When the EDMA transfer completes, you
get an interrupt from the EDMA and that interrupt, in turn, restarts your
timer to generate the next timer-interrupt and DAC pulse, and so on.
Hope this helps,
Regards,
/Khalid
In a message dated 3/22/2004 4:18:49 AM Eastern Standard Time,
v...@yahoo.com writes:
Hello, |
