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On the DSP d.s it is written that the maximum load on the EMIF bus is 2 chips on any CE ? To make the 64 bit bus you need 4 chips - the 32 bit chips on industrial temp. are not 166M - what to do ? Is the problem on the data bus ( in this case I have only one load on each line but still 4 chips on every CE ) or is the problem on the address bus - if so than all the devices are connected on this lines all the time ? has any one used 4 memory chips on 166Mhz on wide temp. ? thanks Gabi |
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DM642 - EMIF bus
Started by ●May 5, 2004
Reply by ●May 5, 20042004-05-05
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Gabi- > On the DSP d.s it is written that the maximum load on the EMIF bus is > 2 chips on any CE ? > > To make the 64 bit bus you need 4 chips - the 32 bit chips on > industrial temp. are not 166M - what to do ? Micron and Samsung have 32-bit SDRAM at speeds up to 166 MHz, commercial temp. -Jeff > Is the problem on the data bus ( in this case I have only one load on > each line but still 4 chips on every CE ) or is the problem on the > address bus - if so than all the devices are connected on this lines > all the time ? > > has any one used 4 memory chips on 166Mhz on wide temp. ? |
