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Dear Experts,
We would like to know
up to what frequency the GPIO lines in C64xx DSPs can operate. In our
application we would like to generate clocks for a CCD which should be around
80MHz. Right now we use FPGAs to do this. Can we achieve this by EDMA
transfers?
Thanks,
Ramanan.
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GPIO - Frequency of operation.
Started by ●December 3, 2004
Reply by ●December 3, 20042004-12-03
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Ramanan- > We would like to know up to what frequency the GPIO lines in C64xx DSPs can > operate. In our application we would like to generate clocks for a CCD which should > be around 80MHz. Right now we use FPGAs to do this. Can we achieve this by EDMA > transfers? Ha, good question. My experience was "you cannot toggle the line every cycle", if that's what you were hoping. On a 150 MHz C67xx, I was able to get pulses no faster than about 90 nsec between edges. There seemed to be a peripheral state machine or something in the way between pin values and memory-mapped registers that hold the pin values. Whatever that is, it induced stalls, whether DMA or optimized asm code in onchip mem was used. For 500 MHz or faster C64xx, maybe you can get a higher pulse rate. But I doubt you will see sub 6.25 nsec, which is what you need for the CCD clock. -Jeff |
