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Mahdavi- > Best thanks > I did that work through EDMA and using frame sync configuration > and finally i got a good result. i can read from FPGA about > 400MBytes/sec. Ok great! One request -- please let the group know when you solve the problem. Especially students may be inspired by your hard work and good results. -Jeff Mahdavi > I mean that i can read from FPGA(sing EMIF) with maximum 8 MHz, > and i read one byte per read. Is this with C code? Asm code? You have to explain in detail what you're doing. > is it possible that i increase > frequency of read from EMIF? Yes. 8 MHz is slow, even for asynchronous EMIF. > Later i want to use all of 32 bits of emif port and i should > read bytes with 25 Mhz from EMIF. You should be able to achieve with no problem. Have you tried DMA access yet? -Jeff |
[Fwd: Re: EMIF SPEED]
Started by ●February 28, 2005
