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Why i should reset the dsp when loading?

Started by xsws5638 June 2, 2005
I use TMS320C6205 on my board. When first time powered on and
use CCS to load a .out file, the CCS shows a dialog saying: " Data
verification failed at address 0x0. please verify target memory and
memory map". It always shows the dialog until i press the power's
reset to reset the DSP. I ever suspect that it's because I have not
configured the GBLCTL register's MAP field when start up CCS. But it
seems a wild suspect(My .gel file is printed as following). Could
anyone gives me some tips. Thanks very much!

StartUp()
{
/* uncomment the following line to initialize the
EMIF registers on the C6x when Code Composer starts up */

emif_init();
}
/*
* Menuitem creates a selection available beneath the GEL
* menu selection in Code Composer Studio.
*/
menuitem "Resets";

hotmenu Reset_and_EMIF_Setup()
{
GEL_Reset();
emif_init();
}

hotmenu Reset_EMIFset_and_ClearBreakPts()
{
GEL_Reset();
emif_init();
GEL_BreakPtReset();
}

/*********************************************/ emif_init()
{
/*-------------------------------
--------*/
/* EMIF REGISTER VALUES FROM
SPRU269B */
/*-------------------------------
--------*/

#define EMIF_GCTL 0x01800000
#define EMIF_CE1 0x01800004
#define EMIF_CE0 0x01800008
#define EMIF_CE2 0x01800010
#define EMIF_CE3 0x01800014
#define EMIF_SDRAMCTL 0x01800018
#define EMIF_SDRAMREF 0x0180001c
/***********************************************************
* Edit values below to conform to your specifications
* The following assumes the EVM6x memory configuration
***********************************************************/

/* OK for 133, 160 MHK CPU clock rate */
*(int *)EMIF_GCTL = 0x3361; // cifigure the MAP field as
MAP 1

/* CE1 */
*(int *)EMIF_CE1 = 0x40f40323;

/* CE0 SBSRAM */
*(int *)EMIF_CE0 = 0x40;

/* CE2 and CE3 SBSRAM */
*(int *)EMIF_CE2 = 0x20;
*(int *)EMIF_CE3 = 0x20;

}