Hi,
this may be board related problem but i was clue less
on this. needed help.
I am using 6711, code running internally. CE0 space is
used for SDRAM, CE1 for Flash, CE2 for SRAM and CE3
with a 3to8 decoder for interfacing i/o. In i/o
devices like UART, ADC are interfaced parallally, it
inclueds some other leds and digital sensing inputs.
And the problem is whenever i try to write something
to SDRAM, my UART (Exar UART XR16C850) initialization
gets currupted. I checked the cross talk of CS signal
by continuosly writing into SDRAM and not writing
anything to UART. UART is not getting the CS signal.
Then how the UART initialization going bad.
Is it the problem with SDRAM initalization.
My SDRAM is 4m16, 2 no of devices. UART uses sdcas for
read enable and sdwe for write enable.
Thanks in advance
BHASKAR REDDY . N
Mysore
Cell: 9880 177365
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SDRAM Interface problem
Started by ●June 24, 2005
Reply by ●June 24, 20052005-06-24
Hello BHASKAR,
If you have multiple devices and only the UART is getting corrupted, I
would suspect a possible logic problem. The actual problem may be occuring when
you are switching devices. Make sure that the enables for you 3:8 are
properly disabling the device while the address lines are changing [most
decoders will glitch when the address lines change]. This would be my first
suspect.
I assume that you use the UART, it works okay. Then you access SDRAM and
the UART doesn't work afterwards.
Try doing only SDRAM reads and see if it fails. If this is the case, try a
similar sequence, except do FLASH reads and see if it fails.
mikedunn
Bhaskar Reddy N <t...@yahoo.com> wrote:
Bhaskar Reddy N <t...@yahoo.com> wrote:
Hi,
this may be board related problem but i was clue less
on this. needed help.
I am using 6711, code running internally. CE0 space is
used for SDRAM, CE1 for Flash, CE2 for SRAM and CE3
with a 3to8 decoder for interfacing i/o. In i/o
devices like UART, ADC are interfaced parallally, it
inclueds some other leds and digital sensing inputs.
And the problem is whenever i try to write something
to SDRAM, my UART (Exar UART XR16C850) initialization
gets currupted. I checked the cross talk of CS signal
by continuosly writing into SDRAM and not writing
anything to UART. UART is not getting the CS signal.
Then how the UART initialization going bad.
Is it the problem with SDRAM initalization.
My SDRAM is 4m16, 2 no of devices. UART uses sdcas for
read enable and sdwe for write enable.
Thanks in advance
BHASKAR REDDY . N
Mysore
Cell: 9880 177365
____________________________________________________
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http://football.fantasysports.yahoo.com
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Reply by ●June 24, 20052005-06-24
Bhaskar-
> this may be board related problem but i was clue less
> on this. needed help.
> I am using 6711, code running internally. CE0 space is
> used for SDRAM, CE1 for Flash, CE2 for SRAM and CE3
> with a 3to8 decoder for interfacing i/o. In i/o
> devices like UART, ADC are interfaced parallally, it
> inclueds some other leds and digital sensing inputs.
> And the problem is whenever i try to write something
> to SDRAM, my UART (Exar UART XR16C850) initialization
> gets currupted. I checked the cross talk of CS signal
> by continuosly writing into SDRAM and not writing
> anything to UART. UART is not getting the CS signal.
> Then how the UART initialization going bad.
> Is it the problem with SDRAM initalization.
> My SDRAM is 4m16, 2 no of devices. UART uses sdcas for
> read enable and sdwe for write enable.
SDRAM has refresh going in the background, so I think you have to watch things more
carefully. My guess is that somehow your 3:8 decoder is allowing a "glitch" type of
UART access during an SDRAM refresh cycle.
According to your mem space description, you should be using something like this:
___________
| |
/AWE--------------------------|/WR |
/ARE--------------------------|/RD |
_____ | UART |
A8----| |o--------------|/CS |
A9----| |o-- A/D CS | |
A10----| 3:8 |o-- LEDs |___________|
| |o-- :
/CE3----|/EN |o-- :
|_____|
-Jeff
> this may be board related problem but i was clue less
> on this. needed help.
> I am using 6711, code running internally. CE0 space is
> used for SDRAM, CE1 for Flash, CE2 for SRAM and CE3
> with a 3to8 decoder for interfacing i/o. In i/o
> devices like UART, ADC are interfaced parallally, it
> inclueds some other leds and digital sensing inputs.
> And the problem is whenever i try to write something
> to SDRAM, my UART (Exar UART XR16C850) initialization
> gets currupted. I checked the cross talk of CS signal
> by continuosly writing into SDRAM and not writing
> anything to UART. UART is not getting the CS signal.
> Then how the UART initialization going bad.
> Is it the problem with SDRAM initalization.
> My SDRAM is 4m16, 2 no of devices. UART uses sdcas for
> read enable and sdwe for write enable.
SDRAM has refresh going in the background, so I think you have to watch things more
carefully. My guess is that somehow your 3:8 decoder is allowing a "glitch" type of
UART access during an SDRAM refresh cycle.
According to your mem space description, you should be using something like this:
___________
| |
/AWE--------------------------|/WR |
/ARE--------------------------|/RD |
_____ | UART |
A8----| |o--------------|/CS |
A9----| |o-- A/D CS | |
A10----| 3:8 |o-- LEDs |___________|
| |o-- :
/CE3----|/EN |o-- :
|_____|
-Jeff
Reply by ●July 1, 20052005-07-01
Hi all,
Thanks for the help.
Actually the problem is not with the SDRAM interface.
The UART i am using has an issue.
It enters factory testmode if IOR and IOW are active
at the same time. where in it continuously sends same
byte on TX. But SDRAM needs these to be active at the
same time to write data.
Thats the reason why it gives problem if i try to
write something, but has no effect if i read SDRAM.
Jeff's sugestion to or the CE signal with IOR/IOW is
the workaround.
Thanks
BHASKAR REDDY . N
Mysore
Cell: 9880 177365
Thanks for the help.
Actually the problem is not with the SDRAM interface.
The UART i am using has an issue.
It enters factory testmode if IOR and IOW are active
at the same time. where in it continuously sends same
byte on TX. But SDRAM needs these to be active at the
same time to write data.
Thats the reason why it gives problem if i try to
write something, but has no effect if i read SDRAM.
Jeff's sugestion to or the CE signal with IOR/IOW is
the workaround.
Thanks
BHASKAR REDDY . N
Mysore
Cell: 9880 177365
Reply by ●July 1, 20052005-07-01
Bhaskar-
> Thanks for the help.
> Actually the problem is not with the SDRAM interface.
> The UART i am using has an issue.
> It enters factory testmode if IOR and IOW are active
> at the same time. where in it continuously sends same
> byte on TX. But SDRAM needs these to be active at the
> same time to write data.
> Thats the reason why it gives problem if i try to
> write something, but has no effect if i read SDRAM.
>
> Jeff's sugestion to or the CE signal with IOR/IOW is
> the workaround.
Hey good teamwork, huh? Thanks for letting us know you got it working. For sure I
would suspect the UART before the SDRAM :-)
-Jeff
> Thanks for the help.
> Actually the problem is not with the SDRAM interface.
> The UART i am using has an issue.
> It enters factory testmode if IOR and IOW are active
> at the same time. where in it continuously sends same
> byte on TX. But SDRAM needs these to be active at the
> same time to write data.
> Thats the reason why it gives problem if i try to
> write something, but has no effect if i read SDRAM.
>
> Jeff's sugestion to or the CE signal with IOR/IOW is
> the workaround.
Hey good teamwork, huh? Thanks for letting us know you got it working. For sure I
would suspect the UART before the SDRAM :-)
-Jeff
