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hello all, I am working on c6211 based system. I have some memory related problems. I have not yet gone through memory mangement and its related documents but still I would like to know whether I am thinking in a correct direction or not. In my system 6211 is interfaced with a host processor(the only interface between the two). 6211 is also provided with external memory. My intention is : Host processor feeds data to 6211 through memory write and dsp operates on it and updates the memory and the host accesses it through memory read. In my case, data fed by host is large and will not fit in the internal RAM of dsp. so I am allocating a buffer for host to write in external memory. similarly I will do for host read operation. When I do this way, since external memory is a single port RAM, each time when host wants to write or read, DSP has to fetch from external memory, keep it in some internal buffer and provide it to HOST. This may degrade my system performance. What is the best solution for this kind of situation???? I think I wouldn't have encountered such problem if internal memory would have been sufficient enough for me since in that case the internal memory would be a dual port RAM and hence Host operation and DSP tasks can run simultaneously. and I think one more disadvantage of using ext. memory is that the very concept of DATA MEMORY AND PROGRAM MEMORY and simulatneous access of it during program execution will disappear and this will help to degrade the sys. performance still more. So what is the best method of solving such problems????? Loooooooooooking forward to your replies................. Thanks. __________________________________________________ |
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memory issues......
Started by ●January 24, 2002
Reply by ●January 24, 20022002-01-24
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rashmi ranjana wrote: > hello all, > I am working on c6211 based system. > I have some memory related problems. > > I have not yet gone through memory mangement and its > related documents but still I would like to know whether I am > thinking in a correct direction or not. > > In my system 6211 is interfaced with a host > processor(the only interface between the two). How do you interface these two processors? Are you using the HPI of the C6211? > 6211 is also provided with external memory. > My intention is : > Host processor feeds data to 6211 through memory write > and dsp operates on it and updates the memory and the host > accesses it through memory read. If you are not using the HPI, how will you arbitrate the accesses to xRAM if both DSP and host use the same bus? The C6211 provides *HOLD and *HOLDA signals but you must be aware of system level issues like DRAM refresh cycles when stalling the EMIF for a long time from accessing the bus. > In my case, data fed by host is large and will not fit > in the internal RAM of dsp. so I am allocating a buffer for > host to write in external memory. similarly I will do for host read > operation. When I do this way, since external memory is a single > port RAM, each time when host wants to write or read, DSP has to > fetch from external memory, keep it in some internal buffer and > provide it to HOST. This may degrade my system performance. > What is the best solution for this kind of > situation???? Why should the C6x fetch the memory for the host and copy it into an internal buffer? Either you use the HPI and the internal hardware will fetch the data into HPIData Register or the host requests bus ownership (*HOLD=0) to access the data itself. > I think I wouldn't have encountered such problem if > internal memory would have been sufficient enough for me since in that > case the internal memory would be a dual port RAM and hence > Host operation and DSP tasks can run simultaneously and I think one > more disadvantage of using ext. memory is that the very concept of > DATA MEMORY AND PROGRAM MEMORY and simulatneous > access of it during program execution will disappear and this will > help to degrade the sys. performance still more. Dual accesses to iRAM can only be performed by the C6x CPU but not simultanously to an off-chip request by a host processor. The host has no data path to the iRAM (except using the HPI). Best Regards, Phil -- --------------------------- Dipl.- Inf. Phil Alder Field Application Engineer DSPecialists GmbH Rotherstra 22 10245 Berlin Email: Germany www.DSPecialists.de --------------------------- DSPecialists Making the Impossible Work ! |
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Reply by ●January 25, 20022002-01-25
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hello, the interface b/n host and 6211 is through HPI. host processor is master and 6211 is slave. > Why should the C6x fetch the memory for the host and > copy > it into an internal buffer? Either you use the HPI > and the internal > hardware will fetch the data into HPIData Register > or the host > requests bus ownership (*HOLD=0) to access the data > itself. Since ext. memory is connected to only dsp , any data transfer from ext. mem. to host should take place through DSP. So i think, during fetching data for the host, DSP will slow down its normal execution of algorithms. --- Phil Alder <> wrote: > rashmi ranjana wrote: > > > hello all, > > I am working on c6211 based system. > > I have some memory related problems. > > > > I have not yet gone through memory mangement and > its > > related documents but still I would like to know > whether I am > > thinking in a correct direction or not. > > > > In my system 6211 is interfaced with a host > > processor(the only interface between the two). > > How do you interface these two processors? > Are you using the HPI of the C6211? > > > 6211 is also provided with external memory. > > My intention is : > > Host processor feeds data to 6211 through memory > write > > and dsp operates on it and updates the memory and > the host > > accesses it through memory read. > > If you are not using the HPI, how will you arbitrate > the accesses to xRAM if both DSP and host use the > same bus? The C6211 provides *HOLD and *HOLDA > signals but you must be aware of system level issues > like DRAM refresh cycles when stalling the EMIF for > a long time from accessing the bus. > > In my case, data fed by host is large and will not > fit > > in the internal RAM of dsp. so I am allocating a > buffer for > > host to write in external memory. similarly I will > do for host read > > operation. When I do this way, since external > memory is a single > > port RAM, each time when host wants to write or > read, DSP has to > > fetch from external memory, keep it in some > internal buffer and > > provide it to HOST. This may degrade my system > performance. > > What is the best solution for this kind of > > situation???? > > Why should the C6x fetch the memory for the host and > copy > it into an internal buffer? Either you use the HPI > and the internal > hardware will fetch the data into HPIData Register > or the host > requests bus ownership (*HOLD=0) to access the data > itself. > > > I think I wouldn't have encountered such problem > if > > internal memory would have been sufficient enough > for me since in that > > case the internal memory would be a dual port RAM > and hence > > Host operation and DSP tasks can run > simultaneously and I think one > > more disadvantage of using ext. memory is that the > very concept of > > DATA MEMORY AND PROGRAM MEMORY and simulatneous > > access of it during program execution will > disappear and this will > > help to degrade the sys. performance still more. > > Dual accesses to iRAM can only be performed by the > C6x CPU > but not simultanously to an off-chip request by a > host processor. > The host has no data path to the iRAM (except using > the HPI). > > Best Regards, > Phil > -- --------------------------- > Dipl.- Inf. > Phil Alder > Field Application Engineer > DSPecialists GmbH > Rotherstra 22 > 10245 Berlin Email: > > Germany www.DSPecialists.de > --------------------------- > DSPecialists Making the Impossible Work ! __________________________________________________ |
