Re: MY GEL FILE(Modified) + ERRORS + MY SOURCE FILE to Jeff

Arunav-

> I am sending the GEL File(Modified according to you), + Errors that are comming +
> My Program with BIG ENDIAN

Why are you using big endian? If your board is set to boot the C6211 little endian,
then you need to set CCS build option to le, and also use le libraries.

Unless hardware constraints demand that you to use big endian for some reason (and it
would need to be a good reason, for example shared memory with a PowerPC processor)
then you should be using little endian.

-Jeff
> =======================================================>
> My GEL FILE
> ======================================================> StartUp()
> {
> setup_memory_map();
> GEL_Reset();
> init_emif();
> }
>
> init_emif()
> {
> /*
> * First we define the EMIF addresses
> */
> #define EMIF_GCTL 0x01800000
> #define EMIF_CE1 0x01800004
> #define EMIF_CE0 0x01800008
> #define EMIF_CE2 0x01800010
> #define EMIF_CE3 0x01800014
> #define EMIF_SDRAMCTL 0x01800018
> #define EMIF_SDRAMTIMING 0x0180001C
> #define EMIF_SDRAMEXT 0x01800020
> #define EMIF_CCFG 0x01840000; /*Cache configuration register*/
> *(int *)EMIF_GCTL = 0x00003300; /* EMIF global control register */
> *(int *)EMIF_CE2 = 0xFFFFFF23; /* CE2-32bit async on daughtercard*/
> #define CE1_32bit *(int *)0x01800004 = 0xFFFFFF23
> }
> clear_memory_map()
> {
> GEL_MapOff();
> }
> setup_memory_map()
> {
> /* Enable memory mapping in Code Composer */
> GEL_MapOn();
> /* Reset all memory to unreadable and unwritable */
> GEL_MapReset();
> /* Syntax for GEL_MapAdd(address, page, length, readable, writeable)
> * page: Program Memory = 0, Data Memory = 1, I/O Space = 2
> * readable: Not Readable = 0, Readable = 1
> * writeable: Not Writeable = 0, Writeable = 1
> */
>
> /* C6211 DSK-specific memory mapping */
> /*--------------------------------*/
> GEL_MapAdd(0x00000000,0,0x00010000,1,1); /* Internal RAM (L2) mem */
> GEL_MapAdd(0x01800000,0,0x00000024,1,1); /* EMIF control regs */
> GEL_MapAdd(0x01840000,0,0x00000004,1,1); /* Cache configuration reg */
> GEL_MapAdd(0x01844000,0,0x00000020,1,1); /* L2 base addr & count regs*/
> GEL_MapAdd(0x01844020,0,0x00000020,1,1); /* L1 base addr & count regs*/
> GEL_MapAdd(0x01845000,0,0x00000008,1,1); /* L2 flush & clean regs */
> GEL_MapAdd(0x01848280,0,0x00000010,1,1); /* CE2 mem attribute regs */
> GEL_MapAdd(0x01880000,0,0x00000004,1,1); /* HPI control reg */
> GEL_MapAdd(0x018c0000,0,0x00000028,1,1); /* McBSP0 regs */
> GEL_MapAdd(0x01900000,0,0x00000028,1,1); /* McBSP1 regs */
> GEL_MapAdd(0x01940000,0,0x0000000c,1,1); /* Timer0 regs */
> GEL_MapAdd(0x01980000,0,0x0000000c,1,1); /* Timer1 regs */
> GEL_MapAdd(0x019c0000,0,0x0000000c,1,1); /* Interrupt selector regs */
> GEL_MapAdd(0x01a00000,0,0x00000800,1,1); /* EDMA parameter RAM */
> GEL_MapAdd(0x01a0ffe0,0,0x00000020,1,1); /* EDMA control regs */
> GEL_MapAdd(0x01bc0000,0,0x00000050,1,1); /********cTools*********/
> GEL_MapAdd(0x02000000,0,0x00000014,0,1); /* QDMA regs */
> GEL_MapAdd(0x02000020,0,0x00000014,0,1); /* QDMA pseudo-regs */
> GEL_MapAdd(0x30000000,0,0x04000000,0,1); /* McBSP0 data */
> GEL_MapAdd(0x34000000,0,0x04000000,0,1); /* McBSP1 data */
> GEL_MapAdd(0xA0000000,0,0x10000000,0,1); /* CE2 - Daughtercard */
> }
> /***********************************************/
> OnReset(int nErrorCode)
> {
> CE1_32bit;
> FlushCache();
> init_emif();
> }
> OnPreFileLoaded()
> {
> CE1_32bit;
> FlushCache();
> }
> FlushCache()
> {
> *(int *)0x01840000 = (*(int *)0x01840000 | 0x00000300);
> }
> menuitem "MEMORY_MAP";
> hotmenu SetMemoryMap()
> {
> setup_memory_map();
> }
> hotmenu ClearMemoryMap()
> {
> clear_memory_map();
> }
> ============================================================================> Errors: -
> Trouble Writing Target CPU memory: Processor accessing not ready memory at
> 0x1840004
> Trouble Writing Target CPU memory: Timeout on Target Processor Please check cabling
> or multi-processor configuration
> Trouble Writing Target CPU memory: Timeout on Target Processor Please check cabling
> or multi-processor configuration
> Trouble Writing Target CPU memory: Timeout on Target Processor Please check cabling
> or multi-processor configuration
> Trouble Writing Target CPU memory: Processor accessing not ready memory at
> 0x1840004
> Trouble Writing Target CPU memory: Processor accessing not ready memory at
> 0x1BC0010
> Can't Set Breakpoint: Processor accessing not ready memory at 0x81C4
> Trouble Writing Target CPU memory: Timeout on Target Processor Please check cabling
> or multi-processor configuration
> Trouble Writing Target CPU memory: Processor accessing not ready memory at
> 0x1840004
> Trouble Writing Target CPU memory: Processor accessing not ready memory at
> 0x1BC0010
> Can't Set Breakpoint: Processor accessing not ready memory at 0x81C4
> =================================================================================> My Program: -
> /* This is the first program to be run on Master card */
>
> #include "std.h"
> #include "c6211dsk.h"
> #include
> #include
> #include
> #include
> void main()
> {
> int arun;
> *(unsigned volatile int *)0x000000FF=0x123456;
> arun=*(unsigned volatile int *)0x000000FF;
> printf("%x",arun);
> if(CHIP_ENDIAN_BIG)
> printf("OK BIG ONE");
> else
> printf("Not BIG");
> }
> ================================================================================> Program is not loading
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