SDRAM problem on custom board

Hello All;
I have designed my own board around C6713B DSP. I am using all EMIF
chip selects to connect, a M48LC4M32B (same chip as the DSK board)
SDRAM (CE0), a flash (CE1), two ASRAMs (CE2) and finally a FPGA on
CE3. A third party have populated eight of these boards.
My problem is that on three of the boards, I cannot run my program in
SDRAM, either right away I get the error “Data Verification Failed at
Address 80000020 :”, or on one of these problematic boards, I can
download the code to SDRAM via CCS, however immediately after c_init00
the PC gets lost, and then I get emulator timing error. I can
however, run that program in internal memory.

Furthermore, on none of these boards I can boot from flash, even
though I am allocating all memory section in the linker file to the
internal RAM of the DSP, and SDRAM is not used at all (to make sure I
check the map file after build)!

I have calculated the EMIF values for this module based on my CPU
clock and the SDRAM specs. Having the system working on five boards,
tells me that timing error due to mistakes in EMIF setting most
probably is not the problem. So I focused on possible mistakes in
populating the board (wrong resistor, etc.), could not find any thing.
Then I compared the power consumption between the good and the bad
boards; very much identical.

So I am running out of ideas, and I thought I should see if any one
here can give me any suggestions.

Thanks
Afshin

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Hi Afshin

Having 5 of the boards working may only say that you got lucky with
that set of parts. Try setting things to a much slower clock tor your
EMIF and see if it changes things. There are lots of PCB issues like
trace length and impedance as well as the chip loading, terminations
and cross talk that let you live or die.

Al

--- In c..., "aporaria" wrote:
>
> Hello All;
> I have designed my own board around C6713B DSP. I am using all EMIF
> chip selects to connect, a M48LC4M32B (same chip as the DSK board)
> SDRAM (CE0), a flash (CE1), two ASRAMs (CE2) and finally a FPGA on
> CE3. A third party have populated eight of these boards.
> My problem is that on three of the boards, I cannot run my program in
> SDRAM, either right away I get the error “Data Verification Failed at
> Address 80000020 :”, or on one of these problematic boards, I can
> download the code to SDRAM via CCS, however immediately after c_init00
> the PC gets lost, and then I get emulator timing error. I can
> however, run that program in internal memory.
>
> Furthermore, on none of these boards I can boot from flash, even
> though I am allocating all memory section in the linker file to the
> internal RAM of the DSP, and SDRAM is not used at all (to make sure I
> check the map file after build)!
>
> I have calculated the EMIF values for this module based on my CPU
> clock and the SDRAM specs. Having the system working on five boards,
> tells me that timing error due to mistakes in EMIF setting most
> probably is not the problem. So I focused on possible mistakes in
> populating the board (wrong resistor, etc.), could not find any thing.
> Then I compared the power consumption between the good and the bad
> boards; very much identical.
>
> So I am running out of ideas, and I thought I should see if any one
> here can give me any suggestions.
>
> Thanks
> Afshin
>

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