Hye
I am using EMIFA of C6416 and i need to send data to FIFO using EMIF @ more
then 100Mhz.i am new in TI DSP . i have studies about alot of registers and
paper to connect with FIFO as refered by memeber of this group. but right now i
just able to get 20 Mhz clock from EMIF Eclk. can u tell me about the exact
register for the setthing i tried alot to set many registers to get the desired
output... please help me regarding this..ill be thankful
Muneeb
---------------------------------
Ahhh...imagining that irresistible "new car" smell?
Check outnew cars at Yahoo! Autos.
EMIF ECLK
Started by ●April 23, 2007
Reply by ●April 23, 20072007-04-23
Muneeb-
> I am using EMIFA of C6416 and i need to send data to FIFO using EMIF @ more then 100Mhz.i am new in TI DSP . i have
> studies about alot of registers and paper to connect with FIFO as refered by memeber of this group. but right now i
> just able to get 20 Mhz clock from EMIF Eclk. can u tell me about the exact register for the setthing i tried alot
> to set many registers to get the desired output... please help me regarding this..ill be thankful
How fast is the DSP clock? You can check this by setting bits in GBLCTL register enabling CLKOUT4 or CLKOUT6 pins,
then make a dig scope measurement on those pins.
-Jeff
> I am using EMIFA of C6416 and i need to send data to FIFO using EMIF @ more then 100Mhz.i am new in TI DSP . i have
> studies about alot of registers and paper to connect with FIFO as refered by memeber of this group. but right now i
> just able to get 20 Mhz clock from EMIF Eclk. can u tell me about the exact register for the setthing i tried alot
> to set many registers to get the desired output... please help me regarding this..ill be thankful
How fast is the DSP clock? You can check this by setting bits in GBLCTL register enabling CLKOUT4 or CLKOUT6 pins,
then make a dig scope measurement on those pins.
-Jeff
Reply by ●April 23, 20072007-04-23
Hye
My C6416 DSK is working on 750 Mhz and i played alot with those bits and let me pose u my complete problem.
i have to send data to EMIFA at rate of more then 100Mhz . data width is 32 bits and for EMIFA i am changing the GBLCTL register. Seting ECLKOUT2 to 1xEMIF input clock..but i dun have any idea how to set ECLKIN to CPU clock .
one more thing . how can i use EDMA to send data through EMIFA. i read alot of literature .can you name me the exact registers which will help me regarding this communications. imp thing right now is about ECLKIN signal.
Muneeb
france
Jeff Brower wrote:
Muneeb-
> I am using EMIFA of C6416 and i need to send data to FIFO using EMIF @ more then 100Mhz.i am new in TI DSP . i have
> studies about alot of registers and paper to connect with FIFO as refered by memeber of this group. but right now i
> just able to get 20 Mhz clock from EMIF Eclk. can u tell me about the exact register for the setthing i tried alot
> to set many registers to get the desired output... please help me regarding this..ill be thankful
How fast is the DSP clock? You can check this by setting bits in GBLCTL register enabling CLKOUT4 or CLKOUT6 pins,
then make a dig scope measurement on those pins.
-Jeff
---------------------------------
Ahhh...imagining that irresistible "new car" smell?
Check outnew cars at Yahoo! Autos.
My C6416 DSK is working on 750 Mhz and i played alot with those bits and let me pose u my complete problem.
i have to send data to EMIFA at rate of more then 100Mhz . data width is 32 bits and for EMIFA i am changing the GBLCTL register. Seting ECLKOUT2 to 1xEMIF input clock..but i dun have any idea how to set ECLKIN to CPU clock .
one more thing . how can i use EDMA to send data through EMIFA. i read alot of literature .can you name me the exact registers which will help me regarding this communications. imp thing right now is about ECLKIN signal.
Muneeb
france
Jeff Brower wrote:
Muneeb-
> I am using EMIFA of C6416 and i need to send data to FIFO using EMIF @ more then 100Mhz.i am new in TI DSP . i have
> studies about alot of registers and paper to connect with FIFO as refered by memeber of this group. but right now i
> just able to get 20 Mhz clock from EMIF Eclk. can u tell me about the exact register for the setthing i tried alot
> to set many registers to get the desired output... please help me regarding this..ill be thankful
How fast is the DSP clock? You can check this by setting bits in GBLCTL register enabling CLKOUT4 or CLKOUT6 pins,
then make a dig scope measurement on those pins.
-Jeff
---------------------------------
Ahhh...imagining that irresistible "new car" smell?
Check outnew cars at Yahoo! Autos.
Reply by ●April 24, 20072007-04-24
Muneeb-
> My C6416 DSK is working on 750 Mhz and i played alot with those bits and let me pose u my complete problem.
Are you sure you don't mean 720 MHz? Assuming 720 MHz, and this is DSK board, then probably your clock rate is Ok.
But, still wouldn't hurt to measure CLKOUT4 or CLKOUT6 signal to prove the DSP is operating as you expect. Also, this
will test your code ability to correctly modify GBLCTL register.
> i have to send data to EMIFA at rate of more then 100Mhz . data width is 32 bits and for EMIFA i am changing the
> GBLCTL register. Seting ECLKOUT2 to 1xEMIF input clock..but i dun have any idea how to set ECLKIN to CPU clock.
You can't do that in software. You must supply ECLKIN via external signal -- hopefully DSK 6416 board allows this via
test points, jumpers, or zero-ohm R selections for ECLKIN signal.
Also, it's a good idea to make ECLKIN synchronized with CPU clock, and not use async, non-related source. For
example, if DSK onboard clock is 60 MHz, and CLKMD pins are set for 10x PLL multiplier (so CPU runs at 720 MHz), then
you can (hopefully, depending on DSK config options) take CLKOUT6 signal and connect to ECLKIN.
-Jeff
> Jeff Brower wrote:
> Muneeb-
>
>> I am using EMIFA of C6416 and i need to send data to FIFO using EMIF @ more then 100Mhz.i am new in TI DSP . i have
>> studies about alot of registers and paper to connect with FIFO as refered by memeber of this group. but right now i
>> just able to get 20 Mhz clock from EMIF Eclk. can u tell me about the exact register for the setthing i tried alot
>> to set many registers to get the desired output... please help me regarding this..ill be thankful
>
> How fast is the DSP clock? You can check this by setting bits in GBLCTL register enabling CLKOUT4 or CLKOUT6 pins,
> then make a dig scope measurement on those pins.
>
> -Jeff
> My C6416 DSK is working on 750 Mhz and i played alot with those bits and let me pose u my complete problem.
Are you sure you don't mean 720 MHz? Assuming 720 MHz, and this is DSK board, then probably your clock rate is Ok.
But, still wouldn't hurt to measure CLKOUT4 or CLKOUT6 signal to prove the DSP is operating as you expect. Also, this
will test your code ability to correctly modify GBLCTL register.
> i have to send data to EMIFA at rate of more then 100Mhz . data width is 32 bits and for EMIFA i am changing the
> GBLCTL register. Seting ECLKOUT2 to 1xEMIF input clock..but i dun have any idea how to set ECLKIN to CPU clock.
You can't do that in software. You must supply ECLKIN via external signal -- hopefully DSK 6416 board allows this via
test points, jumpers, or zero-ohm R selections for ECLKIN signal.
Also, it's a good idea to make ECLKIN synchronized with CPU clock, and not use async, non-related source. For
example, if DSK onboard clock is 60 MHz, and CLKMD pins are set for 10x PLL multiplier (so CPU runs at 720 MHz), then
you can (hopefully, depending on DSK config options) take CLKOUT6 signal and connect to ECLKIN.
-Jeff
> Jeff Brower wrote:
> Muneeb-
>
>> I am using EMIFA of C6416 and i need to send data to FIFO using EMIF @ more then 100Mhz.i am new in TI DSP . i have
>> studies about alot of registers and paper to connect with FIFO as refered by memeber of this group. but right now i
>> just able to get 20 Mhz clock from EMIF Eclk. can u tell me about the exact register for the setthing i tried alot
>> to set many registers to get the desired output... please help me regarding this..ill be thankful
>
> How fast is the DSP clock? You can check this by setting bits in GBLCTL register enabling CLKOUT4 or CLKOUT6 pins,
> then make a dig scope measurement on those pins.
>
> -Jeff
Reply by ●April 25, 20072007-04-25
I have just seen that AELCKOUT2 and BECLKOUT signals are of 120 Mhz from
some test points on DSK. but i cant have those clk signals on EMIF clk pin on
External peripheral interface. so what should i do about it?....
Thanks in advance..
Muneeb
Jeff Brower wrote:
Muneeb-
> My C6416 DSK is working on 750 Mhz and i played alot with those bits and let me pose u my complete problem.
Are you sure you don't mean 720 MHz? Assuming 720 MHz, and this is DSK board, then probably your clock rate is Ok.
But, still wouldn't hurt to measure CLKOUT4 or CLKOUT6 signal to prove the DSP is operating as you expect. Also, this
will test your code ability to correctly modify GBLCTL register.
> i have to send data to EMIFA at rate of more then 100Mhz . data width is 32 bits and for EMIFA i am changing the
> GBLCTL register. Seting ECLKOUT2 to 1xEMIF input clock..but i dun have any idea how to set ECLKIN to CPU clock.
You can't do that in software. You must supply ECLKIN via external signal -- hopefully DSK 6416 board allows this via
test points, jumpers, or zero-ohm R selections for ECLKIN signal.
Also, it's a good idea to make ECLKIN synchronized with CPU clock, and not use async, non-related source. For
example, if DSK onboard clock is 60 MHz, and CLKMD pins are set for 10x PLL multiplier (so CPU runs at 720 MHz), then
you can (hopefully, depending on DSK config options) take CLKOUT6 signal and connect to ECLKIN.
-Jeff
> Jeff Brower wrote:
> Muneeb-
>
>> I am using EMIFA of C6416 and i need to send data to FIFO using EMIF @ more then 100Mhz.i am new in TI DSP . i have
>> studies about alot of registers and paper to connect with FIFO as refered by memeber of this group. but right now i
>> just able to get 20 Mhz clock from EMIF Eclk. can u tell me about the exact register for the setthing i tried alot
>> to set many registers to get the desired output... please help me regarding this..ill be thankful
>
> How fast is the DSP clock? You can check this by setting bits in GBLCTL register enabling CLKOUT4 or CLKOUT6 pins,
> then make a dig scope measurement on those pins.
>
> -Jeff
---------------------------------
Ahhh...imagining that irresistible "new car" smell?
Check outnew cars at Yahoo! Autos.
Thanks in advance..
Muneeb
Jeff Brower wrote:
Muneeb-
> My C6416 DSK is working on 750 Mhz and i played alot with those bits and let me pose u my complete problem.
Are you sure you don't mean 720 MHz? Assuming 720 MHz, and this is DSK board, then probably your clock rate is Ok.
But, still wouldn't hurt to measure CLKOUT4 or CLKOUT6 signal to prove the DSP is operating as you expect. Also, this
will test your code ability to correctly modify GBLCTL register.
> i have to send data to EMIFA at rate of more then 100Mhz . data width is 32 bits and for EMIFA i am changing the
> GBLCTL register. Seting ECLKOUT2 to 1xEMIF input clock..but i dun have any idea how to set ECLKIN to CPU clock.
You can't do that in software. You must supply ECLKIN via external signal -- hopefully DSK 6416 board allows this via
test points, jumpers, or zero-ohm R selections for ECLKIN signal.
Also, it's a good idea to make ECLKIN synchronized with CPU clock, and not use async, non-related source. For
example, if DSK onboard clock is 60 MHz, and CLKMD pins are set for 10x PLL multiplier (so CPU runs at 720 MHz), then
you can (hopefully, depending on DSK config options) take CLKOUT6 signal and connect to ECLKIN.
-Jeff
> Jeff Brower wrote:
> Muneeb-
>
>> I am using EMIFA of C6416 and i need to send data to FIFO using EMIF @ more then 100Mhz.i am new in TI DSP . i have
>> studies about alot of registers and paper to connect with FIFO as refered by memeber of this group. but right now i
>> just able to get 20 Mhz clock from EMIF Eclk. can u tell me about the exact register for the setthing i tried alot
>> to set many registers to get the desired output... please help me regarding this..ill be thankful
>
> How fast is the DSP clock? You can check this by setting bits in GBLCTL register enabling CLKOUT4 or CLKOUT6 pins,
> then make a dig scope measurement on those pins.
>
> -Jeff
---------------------------------
Ahhh...imagining that irresistible "new car" smell?
Check outnew cars at Yahoo! Autos.
Reply by ●April 25, 20072007-04-25
Yes my DSK is working 720 Mhz . i have checked the CLKOUT4 and CLKOUT6 signals
on DSK board they are working fine one at 120 Mhz and other on 180Mhz.
i am sending data to EMIFA bu acessing the register
#define OUTPUT 0xA0000000 and have made the configuration file for EMIFA and set all the relative register . i am recieving data on EMIFA . using logic analyser to see the data . but ECLKOUT signal is always dead no signal on it. i think i am not configuring the registers properly. :( please give me some ideas....
Muneeb
Jeff Brower wrote:
Muneeb-
> My C6416 DSK is working on 750 Mhz and i played alot with those bits and let me pose u my complete problem.
Are you sure you don't mean 720 MHz? Assuming 720 MHz, and this is DSK board, then probably your clock rate is Ok.
But, still wouldn't hurt to measure CLKOUT4 or CLKOUT6 signal to prove the DSP is operating as you expect. Also, this
will test your code ability to correctly modify GBLCTL register.
> i have to send data to EMIFA at rate of more then 100Mhz . data width is 32 bits and for EMIFA i am changing the
> GBLCTL register. Seting ECLKOUT2 to 1xEMIF input clock..but i dun have any idea how to set ECLKIN to CPU clock.
You can't do that in software. You must supply ECLKIN via external signal -- hopefully DSK 6416 board allows this via
test points, jumpers, or zero-ohm R selections for ECLKIN signal.
Also, it's a good idea to make ECLKIN synchronized with CPU clock, and not use async, non-related source. For
example, if DSK onboard clock is 60 MHz, and CLKMD pins are set for 10x PLL multiplier (so CPU runs at 720 MHz), then
you can (hopefully, depending on DSK config options) take CLKOUT6 signal and connect to ECLKIN.
-Jeff
> Jeff Brower wrote:
> Muneeb-
>
>> I am using EMIFA of C6416 and i need to send data to FIFO using EMIF @ more then 100Mhz.i am new in TI DSP . i have
>> studies about alot of registers and paper to connect with FIFO as refered by memeber of this group. but right now i
>> just able to get 20 Mhz clock from EMIF Eclk. can u tell me about the exact register for the setthing i tried alot
>> to set many registers to get the desired output... please help me regarding this..ill be thankful
>
> How fast is the DSP clock? You can check this by setting bits in GBLCTL register enabling CLKOUT4 or CLKOUT6 pins,
> then make a dig scope measurement on those pins.
>
> -Jeff
---------------------------------
Ahhh...imagining that irresistible "new car" smell?
Check outnew cars at Yahoo! Autos.
i am sending data to EMIFA bu acessing the register
#define OUTPUT 0xA0000000 and have made the configuration file for EMIFA and set all the relative register . i am recieving data on EMIFA . using logic analyser to see the data . but ECLKOUT signal is always dead no signal on it. i think i am not configuring the registers properly. :( please give me some ideas....
Muneeb
Jeff Brower wrote:
Muneeb-
> My C6416 DSK is working on 750 Mhz and i played alot with those bits and let me pose u my complete problem.
Are you sure you don't mean 720 MHz? Assuming 720 MHz, and this is DSK board, then probably your clock rate is Ok.
But, still wouldn't hurt to measure CLKOUT4 or CLKOUT6 signal to prove the DSP is operating as you expect. Also, this
will test your code ability to correctly modify GBLCTL register.
> i have to send data to EMIFA at rate of more then 100Mhz . data width is 32 bits and for EMIFA i am changing the
> GBLCTL register. Seting ECLKOUT2 to 1xEMIF input clock..but i dun have any idea how to set ECLKIN to CPU clock.
You can't do that in software. You must supply ECLKIN via external signal -- hopefully DSK 6416 board allows this via
test points, jumpers, or zero-ohm R selections for ECLKIN signal.
Also, it's a good idea to make ECLKIN synchronized with CPU clock, and not use async, non-related source. For
example, if DSK onboard clock is 60 MHz, and CLKMD pins are set for 10x PLL multiplier (so CPU runs at 720 MHz), then
you can (hopefully, depending on DSK config options) take CLKOUT6 signal and connect to ECLKIN.
-Jeff
> Jeff Brower wrote:
> Muneeb-
>
>> I am using EMIFA of C6416 and i need to send data to FIFO using EMIF @ more then 100Mhz.i am new in TI DSP . i have
>> studies about alot of registers and paper to connect with FIFO as refered by memeber of this group. but right now i
>> just able to get 20 Mhz clock from EMIF Eclk. can u tell me about the exact register for the setthing i tried alot
>> to set many registers to get the desired output... please help me regarding this..ill be thankful
>
> How fast is the DSP clock? You can check this by setting bits in GBLCTL register enabling CLKOUT4 or CLKOUT6 pins,
> then make a dig scope measurement on those pins.
>
> -Jeff
---------------------------------
Ahhh...imagining that irresistible "new car" smell?
Check outnew cars at Yahoo! Autos.
Reply by ●April 26, 20072007-04-26
Muneeb-
> Yes my DSK is working 720 Mhz . i have checked the CLKOUT4 and CLKOUT6 signals on DSK board they are working fine
> one at 120 Mhz and other on 180Mhz.
Ok that's a good check.
> i am sending data to EMIFA bu acessing the register
> #define OUTPUT 0xA0000000 and have made the configuration file for EMIFA and set all the relative register . i am
> recieving data on EMIFA . using logic analyser to see the data . but ECLKOUT signal is always dead no signal on it.
> i think i am not configuring the registers properly. :( please give me some ideas....
I'm not clear -- are you trying to write over the expansion (daughtercard) connectors? If so, which CEn space are you
trying to configure? For async or sync access?
Also, after you make changes to EMIFA registers, it's a good idea to make sure you can still correctly access SDRAM on
the DSK card. You should do this sequence as a test:
-run simple SDRAM mem test (write pattern, read back)
-configure EMIF registers
-make test access to your expansion EMIFA space
-run simple SDRAM test again
-Jeff
> Jeff Brower wrote:
> Muneeb-
>
>> My C6416 DSK is working on 750 Mhz and i played alot with those bits and let me pose u my complete problem.
>
> Are you sure you don't mean 720 MHz? Assuming 720 MHz, and this is DSK board, then probably your clock rate is Ok.
> But, still wouldn't hurt to measure CLKOUT4 or CLKOUT6 signal to prove the DSP is operating as you expect. Also, this
> will test your code ability to correctly modify GBLCTL register.
>
>> i have to send data to EMIFA at rate of more then 100Mhz . data width is 32 bits and for EMIFA i am changing the
>> GBLCTL register. Seting ECLKOUT2 to 1xEMIF input clock..but i dun have any idea how to set ECLKIN to CPU clock.
>
> You can't do that in software. You must supply ECLKIN via external signal -- hopefully DSK 6416 board allows this via
> test points, jumpers, or zero-ohm R selections for ECLKIN signal.
>
> Also, it's a good idea to make ECLKIN synchronized with CPU clock, and not use async, non-related source. For
> example, if DSK onboard clock is 60 MHz, and CLKMD pins are set for 10x PLL multiplier (so CPU runs at 720 MHz), then
> you can (hopefully, depending on DSK config options) take CLKOUT6 signal and connect to ECLKIN.
>
> -Jeff
>
>> Jeff Brower wrote:
>> Muneeb-
>>
>>> I am using EMIFA of C6416 and i need to send data to FIFO using EMIF @ more then 100Mhz.i am new in TI DSP . i have
>>> studies about alot of registers and paper to connect with FIFO as refered by memeber of this group. but right now i
>>> just able to get 20 Mhz clock from EMIF Eclk. can u tell me about the exact register for the setthing i tried alot
>>> to set many registers to get the desired output... please help me regarding this..ill be thankful
>>
>> How fast is the DSP clock? You can check this by setting bits in GBLCTL register enabling CLKOUT4 or CLKOUT6 pins,
>> then make a dig scope measurement on those pins.
>>
>> -Jeff
> ---------------------------------
> Ahhh...imagining that irresistible "new car" smell?
> Check outnew cars at Yahoo! Autos.
> Yes my DSK is working 720 Mhz . i have checked the CLKOUT4 and CLKOUT6 signals on DSK board they are working fine
> one at 120 Mhz and other on 180Mhz.
Ok that's a good check.
> i am sending data to EMIFA bu acessing the register
> #define OUTPUT 0xA0000000 and have made the configuration file for EMIFA and set all the relative register . i am
> recieving data on EMIFA . using logic analyser to see the data . but ECLKOUT signal is always dead no signal on it.
> i think i am not configuring the registers properly. :( please give me some ideas....
I'm not clear -- are you trying to write over the expansion (daughtercard) connectors? If so, which CEn space are you
trying to configure? For async or sync access?
Also, after you make changes to EMIFA registers, it's a good idea to make sure you can still correctly access SDRAM on
the DSK card. You should do this sequence as a test:
-run simple SDRAM mem test (write pattern, read back)
-configure EMIF registers
-make test access to your expansion EMIFA space
-run simple SDRAM test again
-Jeff
> Jeff Brower wrote:
> Muneeb-
>
>> My C6416 DSK is working on 750 Mhz and i played alot with those bits and let me pose u my complete problem.
>
> Are you sure you don't mean 720 MHz? Assuming 720 MHz, and this is DSK board, then probably your clock rate is Ok.
> But, still wouldn't hurt to measure CLKOUT4 or CLKOUT6 signal to prove the DSP is operating as you expect. Also, this
> will test your code ability to correctly modify GBLCTL register.
>
>> i have to send data to EMIFA at rate of more then 100Mhz . data width is 32 bits and for EMIFA i am changing the
>> GBLCTL register. Seting ECLKOUT2 to 1xEMIF input clock..but i dun have any idea how to set ECLKIN to CPU clock.
>
> You can't do that in software. You must supply ECLKIN via external signal -- hopefully DSK 6416 board allows this via
> test points, jumpers, or zero-ohm R selections for ECLKIN signal.
>
> Also, it's a good idea to make ECLKIN synchronized with CPU clock, and not use async, non-related source. For
> example, if DSK onboard clock is 60 MHz, and CLKMD pins are set for 10x PLL multiplier (so CPU runs at 720 MHz), then
> you can (hopefully, depending on DSK config options) take CLKOUT6 signal and connect to ECLKIN.
>
> -Jeff
>
>> Jeff Brower wrote:
>> Muneeb-
>>
>>> I am using EMIFA of C6416 and i need to send data to FIFO using EMIF @ more then 100Mhz.i am new in TI DSP . i have
>>> studies about alot of registers and paper to connect with FIFO as refered by memeber of this group. but right now i
>>> just able to get 20 Mhz clock from EMIF Eclk. can u tell me about the exact register for the setthing i tried alot
>>> to set many registers to get the desired output... please help me regarding this..ill be thankful
>>
>> How fast is the DSP clock? You can check this by setting bits in GBLCTL register enabling CLKOUT4 or CLKOUT6 pins,
>> then make a dig scope measurement on those pins.
>>
>> -Jeff
> ---------------------------------
> Ahhh...imagining that irresistible "new car" smell?
> Check outnew cars at Yahoo! Autos.
Reply by ●April 27, 20072007-04-27
Hello
still at same place . but i have done number of checks . i am using daughter card to connect it with FPGA using EMIFA. i need clk on Enternal Peripheral Interface. i am recieving the data correctly on EMIF data pins but the 78th pin on Enternal Peripheral Interface is always dead. i read that pin 75th should be grounded to detected daugther card. i have checked that pin as well and it is grouned. if i change the read write strobe values in CE3 control register is do changes the value. i am enabling the CE3 on eclkout1 and eclkout2 signal but still pin 79 is dead.
I am really thankful to you.
Muneeb
Jeff Brower wrote:
Muneeb-
> Yes my DSK is working 720 Mhz . i have checked the CLKOUT4 and CLKOUT6 signals on DSK board they are working fine
> one at 120 Mhz and other on 180Mhz.
Ok that's a good check.
> i am sending data to EMIFA bu acessing the register
> #define OUTPUT 0xA0000000 and have made the configuration file for EMIFA and set all the relative register . i am
> recieving data on EMIFA . using logic analyser to see the data . but ECLKOUT signal is always dead no signal on it.
> i think i am not configuring the registers properly. :( please give me some ideas....
I'm not clear -- are you trying to write over the expansion (daughtercard) connectors? If so, which CEn space are you
trying to configure? For async or sync access?
Also, after you make changes to EMIFA registers, it's a good idea to make sure you can still correctly access SDRAM on
the DSK card. You should do this sequence as a test:
-run simple SDRAM mem test (write pattern, read back)
-configure EMIF registers
-make test access to your expansion EMIFA space
-run simple SDRAM test again
-Jeff
> Jeff Brower wrote:
> Muneeb-
>
>> My C6416 DSK is working on 750 Mhz and i played alot with those bits and let me pose u my complete problem.
>
> Are you sure you don't mean 720 MHz? Assuming 720 MHz, and this is DSK board, then probably your clock rate is Ok.
> But, still wouldn't hurt to measure CLKOUT4 or CLKOUT6 signal to prove the DSP is operating as you expect. Also, this
> will test your code ability to correctly modify GBLCTL register.
>
>> i have to send data to EMIFA at rate of more then 100Mhz . data width is 32 bits and for EMIFA i am changing the
>> GBLCTL register. Seting ECLKOUT2 to 1xEMIF input clock..but i dun have any idea how to set ECLKIN to CPU clock.
>
> You can't do that in software. You must supply ECLKIN via external signal -- hopefully DSK 6416 board allows this via
> test points, jumpers, or zero-ohm R selections for ECLKIN signal.
>
> Also, it's a good idea to make ECLKIN synchronized with CPU clock, and not use async, non-related source. For
> example, if DSK onboard clock is 60 MHz, and CLKMD pins are set for 10x PLL multiplier (so CPU runs at 720 MHz), then
> you can (hopefully, depending on DSK config options) take CLKOUT6 signal and connect to ECLKIN.
>
> -Jeff
>
>> Jeff Brower wrote:
>> Muneeb-
>>
>>> I am using EMIFA of C6416 and i need to send data to FIFO using EMIF @ more then 100Mhz.i am new in TI DSP . i have
>>> studies about alot of registers and paper to connect with FIFO as refered by memeber of this group. but right now i
>>> just able to get 20 Mhz clock from EMIF Eclk. can u tell me about the exact register for the setthing i tried alot
>>> to set many registers to get the desired output... please help me regarding this..ill be thankful
>>
>> How fast is the DSP clock? You can check this by setting bits in GBLCTL register enabling CLKOUT4 or CLKOUT6 pins,
>> then make a dig scope measurement on those pins.
>>
>> -Jeff
> ---------------------------------
> Ahhh...imagining that irresistible "new car" smell?
> Check outnew cars at Yahoo! Autos.
---------------------------------
Ahhh...imagining that irresistible "new car" smell?
Check outnew cars at Yahoo! Autos.
still at same place . but i have done number of checks . i am using daughter card to connect it with FPGA using EMIFA. i need clk on Enternal Peripheral Interface. i am recieving the data correctly on EMIF data pins but the 78th pin on Enternal Peripheral Interface is always dead. i read that pin 75th should be grounded to detected daugther card. i have checked that pin as well and it is grouned. if i change the read write strobe values in CE3 control register is do changes the value. i am enabling the CE3 on eclkout1 and eclkout2 signal but still pin 79 is dead.
I am really thankful to you.
Muneeb
Jeff Brower wrote:
Muneeb-
> Yes my DSK is working 720 Mhz . i have checked the CLKOUT4 and CLKOUT6 signals on DSK board they are working fine
> one at 120 Mhz and other on 180Mhz.
Ok that's a good check.
> i am sending data to EMIFA bu acessing the register
> #define OUTPUT 0xA0000000 and have made the configuration file for EMIFA and set all the relative register . i am
> recieving data on EMIFA . using logic analyser to see the data . but ECLKOUT signal is always dead no signal on it.
> i think i am not configuring the registers properly. :( please give me some ideas....
I'm not clear -- are you trying to write over the expansion (daughtercard) connectors? If so, which CEn space are you
trying to configure? For async or sync access?
Also, after you make changes to EMIFA registers, it's a good idea to make sure you can still correctly access SDRAM on
the DSK card. You should do this sequence as a test:
-run simple SDRAM mem test (write pattern, read back)
-configure EMIF registers
-make test access to your expansion EMIFA space
-run simple SDRAM test again
-Jeff
> Jeff Brower wrote:
> Muneeb-
>
>> My C6416 DSK is working on 750 Mhz and i played alot with those bits and let me pose u my complete problem.
>
> Are you sure you don't mean 720 MHz? Assuming 720 MHz, and this is DSK board, then probably your clock rate is Ok.
> But, still wouldn't hurt to measure CLKOUT4 or CLKOUT6 signal to prove the DSP is operating as you expect. Also, this
> will test your code ability to correctly modify GBLCTL register.
>
>> i have to send data to EMIFA at rate of more then 100Mhz . data width is 32 bits and for EMIFA i am changing the
>> GBLCTL register. Seting ECLKOUT2 to 1xEMIF input clock..but i dun have any idea how to set ECLKIN to CPU clock.
>
> You can't do that in software. You must supply ECLKIN via external signal -- hopefully DSK 6416 board allows this via
> test points, jumpers, or zero-ohm R selections for ECLKIN signal.
>
> Also, it's a good idea to make ECLKIN synchronized with CPU clock, and not use async, non-related source. For
> example, if DSK onboard clock is 60 MHz, and CLKMD pins are set for 10x PLL multiplier (so CPU runs at 720 MHz), then
> you can (hopefully, depending on DSK config options) take CLKOUT6 signal and connect to ECLKIN.
>
> -Jeff
>
>> Jeff Brower wrote:
>> Muneeb-
>>
>>> I am using EMIFA of C6416 and i need to send data to FIFO using EMIF @ more then 100Mhz.i am new in TI DSP . i have
>>> studies about alot of registers and paper to connect with FIFO as refered by memeber of this group. but right now i
>>> just able to get 20 Mhz clock from EMIF Eclk. can u tell me about the exact register for the setthing i tried alot
>>> to set many registers to get the desired output... please help me regarding this..ill be thankful
>>
>> How fast is the DSP clock? You can check this by setting bits in GBLCTL register enabling CLKOUT4 or CLKOUT6 pins,
>> then make a dig scope measurement on those pins.
>>
>> -Jeff
> ---------------------------------
> Ahhh...imagining that irresistible "new car" smell?
> Check outnew cars at Yahoo! Autos.
---------------------------------
Ahhh...imagining that irresistible "new car" smell?
Check outnew cars at Yahoo! Autos.
Reply by ●April 27, 20072007-04-27
Hello
still at same place . but i have done number of checks . i am using daughter card to connect it with FPGA using EMIFA. i need clk on Enternal Peripheral Interface. i am recieving the data correctly on EMIF data pins but the 78th pin on Enternal Peripheral Interface is always dead. i read that pin 75th should be grounded to detected daugther card. i have checked that pin as well and it is grouned. if i change the read write strobe values in CE3 control register is do changes the value. i am enabling the CE3 on eclkout1 and eclkout2 signal but still pin 79 is dead.
I am really thankful to you.
Muneeb
muneeb abid wrote:
Jeff Brower wrote:
Muneeb-
> Yes my DSK is working 720 Mhz . i have checked the CLKOUT4 and CLKOUT6 signals on DSK board they are working fine
> one at 120 Mhz and other on 180Mhz.
Ok that's a good check.
> i am sending data to EMIFA bu acessing the register
> #define OUTPUT 0xA0000000 and have made the configuration file for EMIFA and set all the relative register . i am
> recieving data on EMIFA . using logic analyser to see the data . but ECLKOUT signal is always dead no signal on it.
> i think i am not configuring the registers properly. :( please give me some ideas....
I'm not clear -- are you trying to write over the expansion (daughtercard) connectors? If so, which CEn space are you
trying to configure? For async or sync access?
Also, after you make changes to EMIFA registers, it's a good idea to make sure you can still correctly access SDRAM on
the DSK card. You should do this sequence as a test:
-run simple SDRAM mem test (write pattern, read back)
-configure EMIF registers
-make test access to your expansion EMIFA space
-run simple SDRAM test again
-Jeff
> Jeff Brower wrote:
> Muneeb-
>
>> My C6416 DSK is working on 750 Mhz and i played alot with those bits and let me pose u my complete problem.
>
> Are you sure you don't mean 720 MHz? Assuming 720 MHz, and this is DSK board, then probably your clock rate is Ok.
> But, still wouldn't hurt to measure CLKOUT4 or CLKOUT6 signal to prove the DSP is operating as you expect. Also, this
> will test your code ability to correctly modify GBLCTL register.
>
>> i have to send data to EMIFA at rate of more then 100Mhz . data width is 32 bits and for EMIFA i am changing the
>> GBLCTL register. Seting ECLKOUT2 to 1xEMIF input clock..but i dun have any idea how to set ECLKIN to CPU clock.
>
> You can't do that in software. You must supply ECLKIN via external signal -- hopefully DSK 6416 board allows this via
> test points, jumpers, or zero-ohm R selections for ECLKIN signal.
>
> Also, it's a good idea to make ECLKIN synchronized with CPU clock, and not use async, non-related source. For
> example, if DSK onboard clock is 60 MHz, and CLKMD pins are set for 10x PLL multiplier (so CPU runs at 720 MHz), then
> you can (hopefully, depending on DSK config options) take CLKOUT6 signal and connect to ECLKIN.
>
> -Jeff
>
>> Jeff Brower wrote:
>> Muneeb-
>>
>>> I am using EMIFA of C6416 and i need to send data to FIFO using EMIF @ more then 100Mhz.i am new in TI DSP . i have
>>> studies about alot of registers and paper to connect with FIFO as refered by memeber of this group. but right now i
>>> just able to get 20 Mhz clock from EMIF Eclk. can u tell me about the exact register for the setthing i tried alot
>>> to set many registers to get the desired output... please help me regarding this..ill be thankful
>>
>> How fast is the DSP clock? You can check this by setting bits in GBLCTL register enabling CLKOUT4 or CLKOUT6 pins,
>> then make a dig scope measurement on those pins.
>>
>> -Jeff
> ---------------------------------
> Ahhh...imagining that irresistible "new car" smell?
> Check outnew cars at Yahoo! Autos.
---------------------------------
Ahhh...imagining that irresistible "new car" smell?
Check out new cars at Yahoo! Autos.
---------------------------------
Ahhh...imagining that irresistible "new car" smell?
Check outnew cars at Yahoo! Autos.
still at same place . but i have done number of checks . i am using daughter card to connect it with FPGA using EMIFA. i need clk on Enternal Peripheral Interface. i am recieving the data correctly on EMIF data pins but the 78th pin on Enternal Peripheral Interface is always dead. i read that pin 75th should be grounded to detected daugther card. i have checked that pin as well and it is grouned. if i change the read write strobe values in CE3 control register is do changes the value. i am enabling the CE3 on eclkout1 and eclkout2 signal but still pin 79 is dead.
I am really thankful to you.
Muneeb
muneeb abid wrote:
Jeff Brower wrote:
Muneeb-
> Yes my DSK is working 720 Mhz . i have checked the CLKOUT4 and CLKOUT6 signals on DSK board they are working fine
> one at 120 Mhz and other on 180Mhz.
Ok that's a good check.
> i am sending data to EMIFA bu acessing the register
> #define OUTPUT 0xA0000000 and have made the configuration file for EMIFA and set all the relative register . i am
> recieving data on EMIFA . using logic analyser to see the data . but ECLKOUT signal is always dead no signal on it.
> i think i am not configuring the registers properly. :( please give me some ideas....
I'm not clear -- are you trying to write over the expansion (daughtercard) connectors? If so, which CEn space are you
trying to configure? For async or sync access?
Also, after you make changes to EMIFA registers, it's a good idea to make sure you can still correctly access SDRAM on
the DSK card. You should do this sequence as a test:
-run simple SDRAM mem test (write pattern, read back)
-configure EMIF registers
-make test access to your expansion EMIFA space
-run simple SDRAM test again
-Jeff
> Jeff Brower wrote:
> Muneeb-
>
>> My C6416 DSK is working on 750 Mhz and i played alot with those bits and let me pose u my complete problem.
>
> Are you sure you don't mean 720 MHz? Assuming 720 MHz, and this is DSK board, then probably your clock rate is Ok.
> But, still wouldn't hurt to measure CLKOUT4 or CLKOUT6 signal to prove the DSP is operating as you expect. Also, this
> will test your code ability to correctly modify GBLCTL register.
>
>> i have to send data to EMIFA at rate of more then 100Mhz . data width is 32 bits and for EMIFA i am changing the
>> GBLCTL register. Seting ECLKOUT2 to 1xEMIF input clock..but i dun have any idea how to set ECLKIN to CPU clock.
>
> You can't do that in software. You must supply ECLKIN via external signal -- hopefully DSK 6416 board allows this via
> test points, jumpers, or zero-ohm R selections for ECLKIN signal.
>
> Also, it's a good idea to make ECLKIN synchronized with CPU clock, and not use async, non-related source. For
> example, if DSK onboard clock is 60 MHz, and CLKMD pins are set for 10x PLL multiplier (so CPU runs at 720 MHz), then
> you can (hopefully, depending on DSK config options) take CLKOUT6 signal and connect to ECLKIN.
>
> -Jeff
>
>> Jeff Brower wrote:
>> Muneeb-
>>
>>> I am using EMIFA of C6416 and i need to send data to FIFO using EMIF @ more then 100Mhz.i am new in TI DSP . i have
>>> studies about alot of registers and paper to connect with FIFO as refered by memeber of this group. but right now i
>>> just able to get 20 Mhz clock from EMIF Eclk. can u tell me about the exact register for the setthing i tried alot
>>> to set many registers to get the desired output... please help me regarding this..ill be thankful
>>
>> How fast is the DSP clock? You can check this by setting bits in GBLCTL register enabling CLKOUT4 or CLKOUT6 pins,
>> then make a dig scope measurement on those pins.
>>
>> -Jeff
> ---------------------------------
> Ahhh...imagining that irresistible "new car" smell?
> Check outnew cars at Yahoo! Autos.
---------------------------------
Ahhh...imagining that irresistible "new car" smell?
Check out new cars at Yahoo! Autos.
---------------------------------
Ahhh...imagining that irresistible "new car" smell?
Check outnew cars at Yahoo! Autos.
Reply by ●April 30, 20072007-04-30
thank you jeff for you all help.. i have found the problem.. the connector on
the DSK board was not working i have the connector now i am having the clk
signal . now i can move on to the protocol designing ...once again thank you for
all the help.
Muneeb Abid
Jeff Brower wrote:
Muneeb-
> Yes my DSK is working 720 Mhz . i have checked the CLKOUT4 and CLKOUT6 signals on DSK board they are working fine
> one at 120 Mhz and other on 180Mhz.
Ok that's a good check.
> i am sending data to EMIFA bu acessing the register
> #define OUTPUT 0xA0000000 and have made the configuration file for EMIFA and set all the relative register . i am
> recieving data on EMIFA . using logic analyser to see the data . but ECLKOUT signal is always dead no signal on it.
> i think i am not configuring the registers properly. :( please give me some ideas....
I'm not clear -- are you trying to write over the expansion (daughtercard) connectors? If so, which CEn space are you
trying to configure? For async or sync access?
Also, after you make changes to EMIFA registers, it's a good idea to make sure you can still correctly access SDRAM on
the DSK card. You should do this sequence as a test:
-run simple SDRAM mem test (write pattern, read back)
-configure EMIF registers
-make test access to your expansion EMIFA space
-run simple SDRAM test again
-Jeff
> Jeff Brower wrote:
> Muneeb-
>
>> My C6416 DSK is working on 750 Mhz and i played alot with those bits and let me pose u my complete problem.
>
> Are you sure you don't mean 720 MHz? Assuming 720 MHz, and this is DSK board, then probably your clock rate is Ok.
> But, still wouldn't hurt to measure CLKOUT4 or CLKOUT6 signal to prove the DSP is operating as you expect. Also, this
> will test your code ability to correctly modify GBLCTL register.
>
>> i have to send data to EMIFA at rate of more then 100Mhz . data width is 32 bits and for EMIFA i am changing the
>> GBLCTL register. Seting ECLKOUT2 to 1xEMIF input clock..but i dun have any idea how to set ECLKIN to CPU clock.
>
> You can't do that in software. You must supply ECLKIN via external signal -- hopefully DSK 6416 board allows this via
> test points, jumpers, or zero-ohm R selections for ECLKIN signal.
>
> Also, it's a good idea to make ECLKIN synchronized with CPU clock, and not use async, non-related source. For
> example, if DSK onboard clock is 60 MHz, and CLKMD pins are set for 10x PLL multiplier (so CPU runs at 720 MHz), then
> you can (hopefully, depending on DSK config options) take CLKOUT6 signal and connect to ECLKIN.
>
> -Jeff
>
>> Jeff Brower wrote:
>> Muneeb-
>>
>>> I am using EMIFA of C6416 and i need to send data to FIFO using EMIF @ more then 100Mhz.i am new in TI DSP . i have
>>> studies about alot of registers and paper to connect with FIFO as refered by memeber of this group. but right now i
>>> just able to get 20 Mhz clock from EMIF Eclk. can u tell me about the exact register for the setthing i tried alot
>>> to set many registers to get the desired output... please help me regarding this..ill be thankful
>>
>> How fast is the DSP clock? You can check this by setting bits in GBLCTL register enabling CLKOUT4 or CLKOUT6 pins,
>> then make a dig scope measurement on those pins.
>>
>> -Jeff
> ---------------------------------
> Ahhh...imagining that irresistible "new car" smell?
> Check outnew cars at Yahoo! Autos.
---------------------------------
Ahhh...imagining that irresistible "new car" smell?
Check outnew cars at Yahoo! Autos.
Muneeb Abid
Jeff Brower wrote:
Muneeb-
> Yes my DSK is working 720 Mhz . i have checked the CLKOUT4 and CLKOUT6 signals on DSK board they are working fine
> one at 120 Mhz and other on 180Mhz.
Ok that's a good check.
> i am sending data to EMIFA bu acessing the register
> #define OUTPUT 0xA0000000 and have made the configuration file for EMIFA and set all the relative register . i am
> recieving data on EMIFA . using logic analyser to see the data . but ECLKOUT signal is always dead no signal on it.
> i think i am not configuring the registers properly. :( please give me some ideas....
I'm not clear -- are you trying to write over the expansion (daughtercard) connectors? If so, which CEn space are you
trying to configure? For async or sync access?
Also, after you make changes to EMIFA registers, it's a good idea to make sure you can still correctly access SDRAM on
the DSK card. You should do this sequence as a test:
-run simple SDRAM mem test (write pattern, read back)
-configure EMIF registers
-make test access to your expansion EMIFA space
-run simple SDRAM test again
-Jeff
> Jeff Brower wrote:
> Muneeb-
>
>> My C6416 DSK is working on 750 Mhz and i played alot with those bits and let me pose u my complete problem.
>
> Are you sure you don't mean 720 MHz? Assuming 720 MHz, and this is DSK board, then probably your clock rate is Ok.
> But, still wouldn't hurt to measure CLKOUT4 or CLKOUT6 signal to prove the DSP is operating as you expect. Also, this
> will test your code ability to correctly modify GBLCTL register.
>
>> i have to send data to EMIFA at rate of more then 100Mhz . data width is 32 bits and for EMIFA i am changing the
>> GBLCTL register. Seting ECLKOUT2 to 1xEMIF input clock..but i dun have any idea how to set ECLKIN to CPU clock.
>
> You can't do that in software. You must supply ECLKIN via external signal -- hopefully DSK 6416 board allows this via
> test points, jumpers, or zero-ohm R selections for ECLKIN signal.
>
> Also, it's a good idea to make ECLKIN synchronized with CPU clock, and not use async, non-related source. For
> example, if DSK onboard clock is 60 MHz, and CLKMD pins are set for 10x PLL multiplier (so CPU runs at 720 MHz), then
> you can (hopefully, depending on DSK config options) take CLKOUT6 signal and connect to ECLKIN.
>
> -Jeff
>
>> Jeff Brower wrote:
>> Muneeb-
>>
>>> I am using EMIFA of C6416 and i need to send data to FIFO using EMIF @ more then 100Mhz.i am new in TI DSP . i have
>>> studies about alot of registers and paper to connect with FIFO as refered by memeber of this group. but right now i
>>> just able to get 20 Mhz clock from EMIF Eclk. can u tell me about the exact register for the setthing i tried alot
>>> to set many registers to get the desired output... please help me regarding this..ill be thankful
>>
>> How fast is the DSP clock? You can check this by setting bits in GBLCTL register enabling CLKOUT4 or CLKOUT6 pins,
>> then make a dig scope measurement on those pins.
>>
>> -Jeff
> ---------------------------------
> Ahhh...imagining that irresistible "new car" smell?
> Check outnew cars at Yahoo! Autos.
---------------------------------
Ahhh...imagining that irresistible "new car" smell?
Check outnew cars at Yahoo! Autos.
