DSPRelated.com
Forums

FIFO and SDRAM on EMIFA on DSP C6415

Started by drenger_gabi July 8, 2002

In my system I have a FIFO of width 16 bit on EMIFA connected
physically on bits D[15..0] .
And on the same EMIFA I have an SDRAM width of 64 bit .

I wont to transfer the data from the FIFO to the SDRAM .

If I will use the PDT feature and EDMA transfer ( It is still not
working but will work on ver. 1.1 !!! ) the data read from the FIFO
will be written only to the low 16 bit of the memory and I will waste
3/4 of the SDRAM so this PDT feature is nice but not useful in this
case .

So I have to make the transfer using normal EDMA transfer not using
the PDT feature .

I am not sure how will the data from the FIFO spread in the mmory -
will it be written on all the 4 byte of the

SDRAM byte after byte ? ( using all the 64 bits width ? ) .

How much time will it take to transfer a FIFO of 16K byte depth to
the SDRAM - how can I calculate the time ?
(The SDRAM and FIFO work on clk of 133 Mhz ) .

In the doc. of the EDMA it is not mentioned the size of the internal
memory of the EDMA and how to make this calc.

Is there any info. about the comparison of the two way's of transfer
the way using PDT compared to not using PDT but in both cases using
EDMA transfer of a FIFO width 16 bit to an SDRAM of 64 bit width ?

What will happen if I will use in my case of transferring 16 bit
FIFO to 64 bit SDRAM the EDMA using :
( See SPRA636A appendix B Figure B-1 )

Element Sync. 1-D SUMb to 1-D DUMb .

Option (OPT ) : PRI - 001 , ESIZE - 01 , 2DS - 0 , SUM - 00 ,
2DD - 0 , DUM - 01 , TCNT - 0 , TCC - 0000 , LINK - 0 , FS - 0

AND el_cnt = 0x1 , fr_cnt = FIFO depth

OR

el_cnt = FIFO depth , fr_cnt =0x0

source address = the FIFO address , destination address = the SDRAM
address .

Will one of this modes solve my problems ?

And what will be the throughput of the transfer ?

Tank's Gabriel Drenger

Elbit Vision Systems
Tel : 972-4-9936431
E-mail :