Shiv-
> when I profiled my application it is taking 85% of
time for L1D stalls
> in DM6446. I am using , text and heap sections in SDRAM and other data
> sections in L2 Ram/CACHE. How to solve these L1D Stalls issue, though
> i am not using L1D at all.
First, I would suggest that stack, heap, and time-crucial code (.text) sections
be placed in onchip RAM, not SDRAM.
Second, the way you mention "data sections in L2 cache" makes me think you may
not understand cache and/or are not
using it properly in your project. You cannot specify code/data sections to be
placed in cache. Instead, L2 cache is
used by processor circuitry as needed, as data is accessed in external mem
(usually SDRAM). You have no control over
what data and when, at least not directly.
You might want to post the following:
-amount of onchip RAM specified in your
project as dedicated to L2 cache
-memory and sections directive excerpts
from your .cmd file
and you might get some help from group members.
-Jeff
