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AW: TMS320LF2407A flash programming error

Started by Egner, Uwe / L-EE August 31, 2005
Hello Jerome,
Maybe your .switch in SARAM at 08000h is a problem.
The flash is from 0h to 7FFFh. There is no flash at 08000h or above.
Change .switch to FLASH.
The length of VECS is 0x40h.
Kind Regards
Uwe

-----Ursprgliche Nachricht-----
Von: jerome.gauvein@jero...
[mailto:jerome.gauvein@jero...]
Gesendet: Mittwoch, 31. August 2005 09:09
An: code-comp@code...
Betreff: [code-comp] TMS320LF2407A flash programming error Hi all,

I've been working on a eZdsp LF2407A and now I've made my own card for my
application but I can't load the program on flash memory. The program is the
same as the one that worked on the eZdsp board, so I don't understand why
loading fail.

I have the following errors :
"data verification failed at adresse 0x803D. please verify target memory and
memory map"
then "the adress specified iun the COFF file is out of range (Flash Memory). Thanks

Sorry for my english.

----
-----------

Here's my cmd file : MEMORY
{
PAGE 0 : /* Program Memory */
VECS : origin = 00000h, length = 0003Fh
FLASH : origin = 00044h, length = 07FBBh
SARAM : origin = 08000h, length = 00800h PAGE 1 : /* Data Memory */
InRam : origin = 00060h, length = 0001Fh
InRam2 : origin = 00800h, length = 007FFh
ExtRam : origin = 08000h, length = 08000h /* System control registers */
CPU_REGS : origin = 00004h, length = 0000Ch
SYS_REGS : origin = 07010h, length = 00010h
WATCHDOG_REGS : origin = 07020h, length = 00010h
SPI_REGS : origin = 07040h, length = 00010h
SCI_REGS : origin = 07050h, length = 00010h
XINT_REGS : origin = 07070h, length = 00002h
GPIO_MUX_REGS : origin = 07090h, length = 00005h
GPIO_DATA_REGS : origin = 07095h, length = 0000Ah
ADC_REGS : origin = 070A0h, length = 00020h
EVA_REGS : origin = 07400h, length = 00032h
EVB_REGS : origin = 07500h, length = 00032h
} SECTIONS
{
_vectors : > VECS PAGE = 0

.cinit : > FLASH PAGE = 0
.text : > FLASH PAGE = 0
.switch : > SARAM PAGE = 0

.data : > InRam2 PAGE = 1
.bss : > InRam2 PAGE = 1
.heap : > ExtRam PAGE = 1
.stack : > ExtRam PAGE = 1 /* Peripheral Frame 1 Register Structures */
CpuregsFile : > CPU_REGS, PAGE = 1
SysregsFile : > SYS_REGS, PAGE = 1
WatchdogregsFile : > WATCHDOG_REGS, PAGE = 1
SpiaRegsFile : > SPI_REGS, PAGE = 1
SciaRegsFile : > SCI_REGS, PAGE = 1
XintregsFile : > XINT_REGS, PAGE = 1
GpioMuxRegsFile : > GPIO_MUX_REGS, PAGE = 1
GpioDataRegsFile : > GPIO_DATA_REGS, PAGE = 1
AdcRegsFile : > ADC_REGS, PAGE = 1
EvaRegsFile : > EVA_REGS, PAGE = 1
EvbRegsFile : > EVB_REGS, PAGE = 1
}


Hello Uwe,

I've changed the .switch to flash as you told me and now I got the message
"Can't Set Breakpoint: Error 0x00000008/-1076 Error during: Break Point,
cannot set/verify breakpoint at 0x00000F36
Breakpoint Manager: An error was encountered attempting to set a breakpoint
used for end of program detection"
But CCS indicates that Flash sectors are programmed.

Regards
Jome -----Message d'origine-----
De: Egner, Uwe / L-EE [mailto:uwe.egner@uwe....]
Envoy mercredi 31 ao 2005 15:00
: 'jerome.gauvein@'jer...'; code-comp@code...
Objet: AW: [code-comp] TMS320LF2407A flash programming error

Hello Jerome,
Maybe your .switch in SARAM at 08000h is a problem.
The flash is from 0h to 7FFFh. There is no flash at 08000h or above.
Change .switch to FLASH.
The length of VECS is 0x40h.
Kind Regards
Uwe

-----Ursprgliche Nachricht-----
Von: jerome.gauvein@jero...
[mailto:jerome.gauvein@jero...]
Gesendet: Mittwoch, 31. August 2005 09:09
An: code-comp@code...
Betreff: [code-comp] TMS320LF2407A flash programming error Hi all,

I've been working on a eZdsp LF2407A and now I've made my own card for my
application but I can't load the program on flash memory. The program is the
same as the one that worked on the eZdsp board, so I don't understand why
loading fail.

I have the following errors :
"data verification failed at adresse 0x803D. please verify target memory and
memory map"
then "the adress specified iun the COFF file is out of range (Flash Memory). Thanks

Sorry for my english.

----
-----------

Here's my cmd file : MEMORY
{
PAGE 0 : /* Program Memory */
VECS : origin = 00000h, length = 0003Fh
FLASH : origin = 00044h, length = 07FBBh
SARAM : origin = 08000h, length = 00800h PAGE 1 : /* Data Memory */
InRam : origin = 00060h, length = 0001Fh
InRam2 : origin = 00800h, length = 007FFh
ExtRam : origin = 08000h, length = 08000h /* System control registers */
CPU_REGS : origin = 00004h, length = 0000Ch
SYS_REGS : origin = 07010h, length = 00010h
WATCHDOG_REGS : origin = 07020h, length = 00010h
SPI_REGS : origin = 07040h, length = 00010h
SCI_REGS : origin = 07050h, length = 00010h
XINT_REGS : origin = 07070h, length = 00002h
GPIO_MUX_REGS : origin = 07090h, length = 00005h
GPIO_DATA_REGS : origin = 07095h, length = 0000Ah
ADC_REGS : origin = 070A0h, length = 00020h
EVA_REGS : origin = 07400h, length = 00032h
EVB_REGS : origin = 07500h, length = 00032h
} SECTIONS
{
_vectors : > VECS PAGE = 0

.cinit : > FLASH PAGE = 0
.text : > FLASH PAGE = 0
.switch : > SARAM PAGE = 0

.data : > InRam2 PAGE = 1
.bss : > InRam2 PAGE = 1
.heap : > ExtRam PAGE = 1
.stack : > ExtRam PAGE = 1 /* Peripheral Frame 1 Register Structures */
CpuregsFile : > CPU_REGS, PAGE = 1
SysregsFile : > SYS_REGS, PAGE = 1
WatchdogregsFile : > WATCHDOG_REGS, PAGE = 1
SpiaRegsFile : > SPI_REGS, PAGE = 1
SciaRegsFile : > SCI_REGS, PAGE = 1
XintregsFile : > XINT_REGS, PAGE = 1
GpioMuxRegsFile : > GPIO_MUX_REGS, PAGE = 1
GpioDataRegsFile : > GPIO_DATA_REGS, PAGE = 1
AdcRegsFile : > ADC_REGS, PAGE = 1
EvaRegsFile : > EVA_REGS, PAGE = 1
EvbRegsFile : > EVB_REGS, PAGE = 1
}