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QPSK Carrier(Frequency) recovery using a PLL in Matlab

Started by Udesh August 25, 2012
Hi all,

I have implemented a carrier (frequency) recovery system in matlab codes using a power 4 PLL (taking the signal to its 4th power to get rid of data signal). I want to analyze the performance of the system at the presence of the noise. But I have some issues regarding the models. I have used a Butterworth low pass filter as the loop filter and an integrator as the VCO.

Could you please advice on the algorithm or could you please send any documentation for the frequency recovery PLL model?

I highly appreciate your advice regarding this matter.

Thank you.
On Fri, 24 Aug 2012 23:41:14 -0700 (PDT), Udesh
<dinukaudesh@gmail.com> wrote:

>Hi all, > >I have implemented a carrier (frequency) recovery system in matlab codes us= >ing a power 4 PLL (taking the signal to its 4th power to get rid of data si= >gnal). I want to analyze the performance of the system at the presence of t= >he noise. But I have some issues regarding the models. I have used a Butter= >worth low pass filter as the loop filter and an integrator as the VCO. > >Could you please advice on the algorithm or could you please send any docum= >entation for the frequency recovery PLL model? > >I highly appreciate your advice regarding this matter. > >Thank you.
Do you want a Phase-Locked Loop (PLL) that can correct a frequency offset or do you want a Frequency-Locked Loop (FLL) ? PLLs can correct frequency within the pull range of the loop. This is pretty well treated in many texts/articles that cover PLLs. Eric Jacobsen Anchor Hill Communications www.anchorhill.com
On Sunday, August 26, 2012 2:53:41 AM UTC+10, Eric Jacobsen wrote:
> On Fri, 24 Aug 2012 23:41:14 -0700 (PDT), Udesh > > > > > > >Hi all, > > > > > >I have implemented a carrier (frequency) recovery system in matlab codes us= > > >ing a power 4 PLL (taking the signal to its 4th power to get rid of data si= > > >gnal). I want to analyze the performance of the system at the presence of t= > > >he noise. But I have some issues regarding the models. I have used a Butter= > > >worth low pass filter as the loop filter and an integrator as the VCO. > > > > > >Could you please advice on the algorithm or could you please send any docum= > > >entation for the frequency recovery PLL model? > > > > > >I highly appreciate your advice regarding this matter. > > > > > >Thank you. > > > > Do you want a Phase-Locked Loop (PLL) that can correct a frequency > > offset or do you want a Frequency-Locked Loop (FLL) ? > > > > PLLs can correct frequency within the pull range of the loop. This > > is pretty well treated in many texts/articles that cover PLLs. > > > > > > Eric Jacobsen > > Anchor Hill Communications > > www.anchorhill.com
Hi Eric, Thanks for you reply. I actually want a Frequency locked loop. I want to model frequency detector/phase detector and VCO algorithm. Currently I'm using a phase detector and it gives me trouble. Could you suggest some materials which I can use? Cheers, Udesh.
On Fri, 24 Aug 2012 23:41:14 -0700, Udesh wrote:

> Hi all, > > I have implemented a carrier (frequency) recovery system in matlab codes > using a power 4 PLL (taking the signal to its 4th power to get rid of > data signal). I want to analyze the performance of the system at the > presence of the noise. But I have some issues regarding the models. I > have used a Butterworth low pass filter as the loop filter and an > integrator as the VCO.
The term "Loop filter" in a PLL is a misnomer. It should be called "loop controller". Doing so would prevent people from being mislead into using filters that are good in open loop (like a Butterworth) for a PLL loop filter. As soon as you cascade your Butterworth filter with an integrator and put it in closed loop, the filtering action of the PLL is going to be anything but Butterworth.
> Could you please advice on the algorithm or could you please send any > documentation for the frequency recovery PLL model?
Don't use a Butterworth (or a Chebychev, or a Bessel, or any other known- good low-pass filter structure) as your loop filter. Get a good book on PLL design, instead, and read it.
> I highly appreciate your advice regarding this matter.
I wouldn't put more than a single pole of pure low-pass filtering in the loop filter. If you must have more filtering, post-filter the PLL output. As Eric mentioned, a loop filter without a pure integrator in it is going to give you a frequency-locked loop, which means that for any non-zero frequency error you'll have a non-zero phase error. The degree of phase error will be the ratio of your frequency error and your loop bandwidth -- meaning that the more filtering you try to do inside your loop, the worse phase error you'll experience. I'd use a proportional-integral controller for a "loop filter". This will give you zero phase error, it's a classic prescription, and there's tons of literature on setting it up. I can't recommend a good book on PLL theory that includes digital PLLs: my education is in analog circuits, with a lot of figuring out done afterwards. But the classic PLL book is Floyd Gardener's, and my favorite (only because I took PLL design from the author) is Wolavar's "Phase Locked Loop Circuit Design". You can get either one of those and extrapolate from there to digital PLL design, or you can query the group on a good modern PLL book. -- My liberal friends think I'm a conservative kook. My conservative friends think I'm a liberal kook. Why am I not happy that they have found common ground? Tim Wescott, Communications, Control, Circuits & Software http://www.wescottdesign.com