McBSP receive interrupt can't be generated in digital loopback mode?

I am working on TI OMAP5910 processor which integrates a TMS320C55x DSP and an 
ARM925 on a single chip.  To test McBSP, I make it in digital loop back mode, 
transmit data then receive it.

Everything is ok except that no McBSP receive interrupt was generated. The following
is my configuration for McBSP1:

static struct omap_mcbsp_reg_cfg  aic23_config =
{
    0x00c0, //u16    spcr2;
    0x8000, //u16    spcr1;
    0x0002, //u16    rcr2;
    0x00c0, //u16    rcr1;
    0x0002, //u16    xcr2;
    0x00c0, //u16    xcr1;
    0x200f, //u16    srgr2;
    0x0101, //u16    srgr1;
    0x0000, //u16    mcr2;
    0x0000, //u16    mcr1;
    0x0a00, //u16    pcr0;
    0x0000, //u16    rcerc;
    0x0000, //u16    rcerd;
    0x0000, //u16    xcerc;
    0x0000, //u16    xcerd;
    0x0000, //u16    rcere;
    0x0000, //u16    rcerf;
    0x0000, //u16    xcere;
    0x0000, //u16    xcerf;
    0x0000, //u16    rcerg;
    0x0000, //u16    rcerh;
    0x0000, //u16    xcerg;
    0x0000, //u16    xcerh;
};
The transmit interrupt had been generated.
Any comment will be appriated.


best regard.

John Geffen

Do you have that interrupt enabled in the IER?  Is the flag ever getting set 
in the IFR?  Do you ever see RRDY?  Is the data arriving correctly?

Brad

"John Geffen" <john_geffen@sina.com> wrote in message 
news:90a74241.0411160121.68e0f26c@posting.google.com...
>I am working on TI OMAP5910 processor which integrates a TMS320C55x DSP and 
>an
> ARM925 on a single chip.  To test McBSP, I make it in digital loop back 
> mode,
> transmit data then receive it.
>
> Everything is ok except that no McBSP receive interrupt was generated. The 
> following
> is my configuration for McBSP1:
>
> static struct omap_mcbsp_reg_cfg  aic23_config =
> {
>    0x00c0, //u16    spcr2;
>    0x8000, //u16    spcr1;
>    0x0002, //u16    rcr2;
>    0x00c0, //u16    rcr1;
>    0x0002, //u16    xcr2;
>    0x00c0, //u16    xcr1;
>    0x200f, //u16    srgr2;
>    0x0101, //u16    srgr1;
>    0x0000, //u16    mcr2;
>    0x0000, //u16    mcr1;
>    0x0a00, //u16    pcr0;
>    0x0000, //u16    rcerc;
>    0x0000, //u16    rcerd;
>    0x0000, //u16    xcerc;
>    0x0000, //u16    xcerd;
>    0x0000, //u16    rcere;
>    0x0000, //u16    rcerf;
>    0x0000, //u16    xcere;
>    0x0000, //u16    xcerf;
>    0x0000, //u16    rcerg;
>    0x0000, //u16    rcerh;
>    0x0000, //u16    xcerg;
>    0x0000, //u16    xcerh;
> };
> The transmit interrupt had been generated.
> Any comment will be appriated.
>
>
> best regard.
>
> John Geffen