Practical implementation question

All,

I am working on a project where I have designed a microprocessor board
based on a fixed point DSP.  So far, my experience with DSP has been
almost entirely simulation based and I am presently at the stage where
I am starting to apply some of the theory to the real world
application.  At this point, I have run into something, which I have
not satisfactorilly covered in my readings and I am hoping that
somebody could help me out by providing some suggestions.

As a bit of background information:  My application uses a 12 bit ADC
that runs single supply 0 to 3 volts, (ideally) corresponding to
converted outputs of 0 to 4095.  To handle bipolar signals, my
interface hardware introduces a zero input offset of 1.5 volts, which
represents the midpoint of the conversion range and scales the inputs
into the 0 to 3 volt range.  Consequently, negative polarity signals
appear at the input of the converter between 0 and 1.5 volts and
positive polarity signals are between 1.5 and 3 volts.  As one of the
intial experiements, I applied a sinusoidal signal to the converter and
plotted the result on a graph window and as expected I saw a sine wave
of the expected ampltiude and frequency, centered about the midpoint of
2048.  The ADC outputs are left justified.

My question concerns how to best handle the numerical representation of
the bipolar signals.   My initial thought was that I could subtract
2048 from each of the sampled values and this results in a two's
complement, postivive and negative representation.  My second thought
is that I could treat the MSB as a sign bit, but this could result in a
180 degree phase shift as the "positive" half cycle would be
represented by the larger numbers with the MSB set if I follow what I
believe to be the standard convention.  My third thought is that I
could somehow use the Q format representation, but I am not totally
clear on this concept yet, or how it applies to my situation.

If my understanding is correct, the problem is one of user or
programmer interpration as the numbers are just that and can be passed
to an algorithm, such as a filter, and I will still receive the
mathematically, or rather numerically, correct result.

 I was wondering if anybody coulld help steer me in the correct
direction with some suggestions of how best to represent the numbers or
some links to some good informational sources on this subject.

"Noway2" <no_spam_me2@hotmail.com> wrote in news:1131372442.830561.68680
@g14g2000cwa.googlegroups.com:

> All,
> 
> I am working on a project where I have designed a microprocessor board
> based on a fixed point DSP.  So far, my experience with DSP has been
> almost entirely simulation based and I am presently at the stage where
> I am starting to apply some of the theory to the real world
> application.  At this point, I have run into something, which I have
> not satisfactorilly covered in my readings and I am hoping that
> somebody could help me out by providing some suggestions.
> 
> As a bit of background information:  My application uses a 12 bit ADC
> that runs single supply 0 to 3 volts, (ideally) corresponding to
> converted outputs of 0 to 4095.  To handle bipolar signals, my
> interface hardware introduces a zero input offset of 1.5 volts, which
> represents the midpoint of the conversion range and scales the inputs
> into the 0 to 3 volt range.  Consequently, negative polarity signals
> appear at the input of the converter between 0 and 1.5 volts and
> positive polarity signals are between 1.5 and 3 volts.  As one of the
> intial experiements, I applied a sinusoidal signal to the converter and
> plotted the result on a graph window and as expected I saw a sine wave
> of the expected ampltiude and frequency, centered about the midpoint of
> 2048.  The ADC outputs are left justified.
> 
> My question concerns how to best handle the numerical representation of
> the bipolar signals.   My initial thought was that I could subtract
> 2048 from each of the sampled values and this results in a two's
> complement, postivive and negative representation.  My second thought
> is that I could treat the MSB as a sign bit, but this could result in a
> 180 degree phase shift as the "positive" half cycle would be
> represented by the larger numbers with the MSB set if I follow what I
> believe to be the standard convention.  My third thought is that I
> could somehow use the Q format representation, but I am not totally
> clear on this concept yet, or how it applies to my situation.
> 
> If my understanding is correct, the problem is one of user or
> programmer interpration as the numbers are just that and can be passed
> to an algorithm, such as a filter, and I will still receive the
> mathematically, or rather numerically, correct result.
> 
>  I was wondering if anybody coulld help steer me in the correct
> direction with some suggestions of how best to represent the numbers or
> some links to some good informational sources on this subject.
> 
> 

My guess is that you will you want the data in fractional twos complement 
format. This would be twos complement as you suggested by subtracting 
2048 and then bit shifting the result so that the sign bit is the most 
significant bit. For example, if you have a 16 bit DSP, you would shift 4 
bits. This would cause your values to range from 0x7FF0 to 0x8000. This 
range is usually interpreted as values from almost 1 to -1. In ADI speak, 
this would be 1.15 format, I think TI calls it Q15.
 

-- 
Al Clark
Danville Signal Processing, Inc.
--------------------------------------------------------------------
Purveyors of Fine DSP Hardware and other Cool Stuff
Available at http://www.danvillesignal.com

Noway2 wrote:
> All,
> 
> I am working on a project where I have designed a microprocessor board
> based on a fixed point DSP.  So far, my experience with DSP has been
> almost entirely simulation based and I am presently at the stage where
> I am starting to apply some of the theory to the real world
> application.  At this point, I have run into something, which I have
> not satisfactorilly covered in my readings and I am hoping that
> somebody could help me out by providing some suggestions.
> 
> As a bit of background information:  My application uses a 12 bit ADC
> that runs single supply 0 to 3 volts, (ideally) corresponding to
> converted outputs of 0 to 4095.  To handle bipolar signals, my
> interface hardware introduces a zero input offset of 1.5 volts, which
> represents the midpoint of the conversion range and scales the inputs
> into the 0 to 3 volt range.  Consequently, negative polarity signals
> appear at the input of the converter between 0 and 1.5 volts and
> positive polarity signals are between 1.5 and 3 volts.  As one of the
> intial experiements, I applied a sinusoidal signal to the converter and
> plotted the result on a graph window and as expected I saw a sine wave
> of the expected ampltiude and frequency, centered about the midpoint of
> 2048.  The ADC outputs are left justified.
> 
> My question concerns how to best handle the numerical representation of
> the bipolar signals.   My initial thought was that I could subtract
> 2048 from each of the sampled values and this results in a two's
> complement, postivive and negative representation.  My second thought
> is that I could treat the MSB as a sign bit, but this could result in a
> 180 degree phase shift as the "positive" half cycle would be
> represented by the larger numbers with the MSB set if I follow what I
> believe to be the standard convention.  My third thought is that I
> could somehow use the Q format representation, but I am not totally
> clear on this concept yet, or how it applies to my situation.
> 
> If my understanding is correct, the problem is one of user or
> programmer interpration as the numbers are just that and can be passed
> to an algorithm, such as a filter, and I will still receive the
> mathematically, or rather numerically, correct result.
> 
>  I was wondering if anybody coulld help steer me in the correct
> direction with some suggestions of how best to represent the numbers or
> some links to some good informational sources on this subject.

Invert the MSB.

Jerry
-- 
Engineering is the art of making what you want from things you can get.
�����������������������������������������������������������������������

Noway2 wrote:

> All,
> 
> I am working on a project where I have designed a microprocessor board
> based on a fixed point DSP.  So far, my experience with DSP has been
> almost entirely simulation based and I am presently at the stage where
> I am starting to apply some of the theory to the real world
> application.  At this point, I have run into something, which I have
> not satisfactorilly covered in my readings and I am hoping that
> somebody could help me out by providing some suggestions.
> 
> As a bit of background information:  My application uses a 12 bit ADC
> that runs single supply 0 to 3 volts, (ideally) corresponding to
> converted outputs of 0 to 4095.  To handle bipolar signals, my
> interface hardware introduces a zero input offset of 1.5 volts, which
> represents the midpoint of the conversion range and scales the inputs
> into the 0 to 3 volt range.  Consequently, negative polarity signals
> appear at the input of the converter between 0 and 1.5 volts and
> positive polarity signals are between 1.5 and 3 volts.  As one of the
> intial experiements, I applied a sinusoidal signal to the converter and
> plotted the result on a graph window and as expected I saw a sine wave
> of the expected ampltiude and frequency, centered about the midpoint of
> 2048.  The ADC outputs are left justified.
> 
> My question concerns how to best handle the numerical representation of
> the bipolar signals.   My initial thought was that I could subtract
> 2048 from each of the sampled values and this results in a two's
> complement, postivive and negative representation.  My second thought
> is that I could treat the MSB as a sign bit, but this could result in a
> 180 degree phase shift as the "positive" half cycle would be
> represented by the larger numbers with the MSB set if I follow what I
> believe to be the standard convention.  My third thought is that I
> could somehow use the Q format representation, but I am not totally
> clear on this concept yet, or how it applies to my situation.
> 
> If my understanding is correct, the problem is one of user or
> programmer interpration as the numbers are just that and can be passed
> to an algorithm, such as a filter, and I will still receive the
> mathematically, or rather numerically, correct result.
> 
>  I was wondering if anybody coulld help steer me in the correct
> direction with some suggestions of how best to represent the numbers or
> some links to some good informational sources on this subject.

Often you have some anolog electronics (OPs) in front of your ADC and it
produces a litte offset to your signal. I therefor subtract not the ideal
2048 but I subtract the offsetvalue, that is near 2048. The offsetvalue is
measured in the calibration phase of the production, or if you have a pur
AC-signals you realize a low-pass with a very deep cutoff in software to
get the DC-offset.
-- 
Freundliche Gr�sse -- Regards

F. Seuhs

Mailto: friedrich.seuhs@hasos.com

Jerry Avins wrote:
> Noway2 wrote:
>> All,
>>
>> I am working on a project where I have designed a microprocessor board
>> based on a fixed point DSP.  So far, my experience with DSP has been
>> almost entirely simulation based and I am presently at the stage where
>> I am starting to apply some of the theory to the real world
>> application.  At this point, I have run into something, which I have
>> not satisfactorilly covered in my readings and I am hoping that
>> somebody could help me out by providing some suggestions.
>>
>> As a bit of background information:  My application uses a 12 bit ADC
>> that runs single supply 0 to 3 volts, (ideally) corresponding to
>> converted outputs of 0 to 4095.  To handle bipolar signals, my
>> interface hardware introduces a zero input offset of 1.5 volts, which
>> represents the midpoint of the conversion range and scales the inputs
>> into the 0 to 3 volt range.  Consequently, negative polarity signals
>> appear at the input of the converter between 0 and 1.5 volts and
>> positive polarity signals are between 1.5 and 3 volts.  As one of the
>> intial experiements, I applied a sinusoidal signal to the converter and
>> plotted the result on a graph window and as expected I saw a sine wave
>> of the expected ampltiude and frequency, centered about the midpoint of
>> 2048.  The ADC outputs are left justified.
>>
>> My question concerns how to best handle the numerical representation of
>> the bipolar signals.   My initial thought was that I could subtract
>> 2048 from each of the sampled values and this results in a two's
>> complement, postivive and negative representation.  My second thought
>> is that I could treat the MSB as a sign bit, but this could result in a
>> 180 degree phase shift as the "positive" half cycle would be
>> represented by the larger numbers with the MSB set if I follow what I
>> believe to be the standard convention.  My third thought is that I
>> could somehow use the Q format representation, but I am not totally
>> clear on this concept yet, or how it applies to my situation.
>>
>> If my understanding is correct, the problem is one of user or
>> programmer interpration as the numbers are just that and can be passed
>> to an algorithm, such as a filter, and I will still receive the
>> mathematically, or rather numerically, correct result.
>>
>>  I was wondering if anybody coulld help steer me in the correct
>> direction with some suggestions of how best to represent the numbers or
>> some links to some good informational sources on this subject.
> 
> Invert the MSB.
 >
 > Jerry

You quoted all that to say this, Jerry?  You're hardly the only one here 
doing it, but the endless cascading and blind top/bottom responses are 
totally out of hand yet again.  It doesn't take _that_ much effort to 
trim down to the necessary context; it's about being considerate.

I don't know what it is about this group and all that abundant laziness. 
  There's not another group like it in my experience.

I know I quoted it all too but it was to make a point.


Thanks,

Bob
-- 

"Things should be described as simply as possible, but no simpler."

                                              A. Einstein

Noway2 wrote:

> My question concerns how to best handle the numerical representation of
> the bipolar signals.   My initial thought was that I could subtract
> 2048 from each of the sampled values and this results in a two's
> complement, postivive and negative representation.  My second thought
> is that I could treat the MSB as a sign bit, but this could result in a
> 180 degree phase shift as the "positive" half cycle would be
> represented by the larger numbers with the MSB set if I follow what I
> believe to be the standard convention.  My third thought is that I
> could somehow use the Q format representation, but I am not totally
> clear on this concept yet, or how it applies to my situation.

I've done it this way:
- at the initialization of DSP, when I know that there are no inputs to
ADC, I sample 4096 values to calculate the offset (near 2048 but not
exactly 2048).
- then I substract this offset from every sample I get, thus I obtain
two's complement number.
- further on I multiply it by constant, so that I obtain desired Q
value (e.g. I am measuring current with resolution of 14Amps/4096bits.
The value fits in Q11 format so I need to multiply the ADC value with
28672 and the upper 16 bits(with additional left shift) give me the Q11
result.) I hope the example is clear and helpful.

Regards

Mitja

Everyone, Thank You.

I wanted to make sure that I wasn't missing something obvious and
introducing extra computations.

It looks as though both subtracting off the offset and inverting the
sign bit are appropriate.  I would say the choice would likely depend
on the hardware that is being used.  In this particular case, the
hardware was designed for two's complement with saturation so
subtraction of the offset is the way I think would be best to go.  If
the hardware were sign + magnitude based, inverting the sign bit would
make sense.

Bob Cain wrote:
> 
> 
> Jerry Avins wrote:

   ...

>> Invert the MSB.
> 
>  >
>  > Jerry
> 
> You quoted all that to say this, Jerry?  You're hardly the only one here 
> doing it, but the endless cascading and blind top/bottom responses are 
> totally out of hand yet again.  It doesn't take _that_ much effort to 
> trim down to the necessary context; it's about being considerate.

   ...

> I know I quoted it all too but it was to make a point.

I quoted it all in order to make a different point: that the very wordy 
question had a very simple answer.

Jerry
-- 
Engineering is the art of making what you want from things you can get.
�����������������������������������������������������������������������

Noway2 wrote:
> Everyone, Thank You.
> 
> I wanted to make sure that I wasn't missing something obvious and
> introducing extra computations.
> 
> It looks as though both subtracting off the offset and inverting the
> sign bit are appropriate.  I would say the choice would likely depend
> on the hardware that is being used.  In this particular case, the
> hardware was designed for two's complement with saturation so
> subtraction of the offset is the way I think would be best to go.  If
> the hardware were sign + magnitude based, inverting the sign bit would
> make sense.

When the offset is half scale, subtracting it inverts the sign bit and 
has the additional advantage of extending it to all higher bits. Some 
ADCs have an input that is XORed (or XNORed) with the MSB. It allows you 
to configure the ADC for straight and offset binary when in one state, 
and for two's complement in the other. If your ADC had that feature, use 
it and connect the sign bit also to all higher bits, giving automatic 
sign extension. Of course, that doesn't track parasitic offsets that 
occur with aging and time.

Jerry
-- 
Engineering is the art of making what you want from things you can get.
�����������������������������������������������������������������������