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Question about MASK in ADI assemble language

Started by caterpiller November 9, 2006
hi, there,

I dont understand how to use MASK well.

I read the examples in ADSP TS101s Programming language guide, there is
example for MASK.

XR3 = 0x00007B00;;
XR4 = 0x50325032;;
XR5 = 0x85FFFFFF;; /* before mask instruction */
XR5 += MASK R4 BY R3
/* After mask instruction, XR5 = 0x85FFD4FF */

I konw MASK R4 BY R3 can get 0x00000500, but how XR5 become 0x85FFD4FF
from 0x85FFFFFF?

The manual said "The shifter takes the bits from XR4 corresponding to
the mask XR3 and ORs
them into the XR5 register". How to understand "ORs" here? I ORed
0x00000500 with XR5 and can not get the final value.

Would somebody elaborate this for me?

thanks.

caterpiller wrote:
> hi, there, > > I dont understand how to use MASK well. > > I read the examples in ADSP TS101s Programming language guide, there is > example for MASK. > > XR3 = 0x00007B00;; > XR4 = 0x50325032;; > XR5 = 0x85FFFFFF;; /* before mask instruction */ > XR5 += MASK R4 BY R3 > /* After mask instruction, XR5 = 0x85FFD4FF */ > > I konw MASK R4 BY R3 can get 0x00000500, but how XR5 become 0x85FFD4FF > from 0x85FFFFFF? > > The manual said "The shifter takes the bits from XR4 corresponding to > the mask XR3 and ORs > them into the XR5 register". How to understand "ORs" here? I ORed > 0x00000500 with XR5 and can not get the final value. > > Would somebody elaborate this for me? > > thanks. >
The operation Rs += MASK Rn BY Rm is equivalent to Rs = (Rs AND NOT(Rm)) OR (Rn AND Rm) substituting your values we get: Rs = (0x85FFFFFF AND NOT(0x00007B00) OR (0x50325032 AND 0x00007B00) = (0x85FFFFFF AND 0xFFFF84FF) OR (0x5000) = 0x85FF84FF OR 0x5000 = 0x85FFD4FF -- Jim Thomas Principal Applications Engineer Bittware, Inc jthomas@bittware.com http://www.bittware.com (603) 226-0404 x536 There's a fine line between clever and stupid