Hi all, My question is related to sigma-delta conversion. I understand the analog side of this, i.e. the modulator, and have developed a matlab simulation which gives me 1's and -1's output for any input signal. Essentially, this is the high data rate 1 bit output of the sigma delta modulator. Now, I need help understanding the decimation process. Conceptually, I understand what decimation is (low pass filtering and then downsampling). However, how does this yield a multibit output? i.e., how do the high rate of 1 bit outputs turn into a multi-bit output? thanks for your help! "Roughly one-third of the American diet comes from food-" Holden, Science October 2006 issue

# Question about Sigma-Delta conversion/decimation

Started by ●June 12, 2007

Posted by ●June 12, 2007

Kiran wrote:> Hi all, > My question is related to sigma-delta conversion. I understand the > analog side of this, i.e. the modulator, and have developed a matlab > simulation which gives me 1's and -1's output for any input signal. > Essentially, this is the high data rate 1 bit output of the sigma > delta modulator. > Now, I need help understanding the decimation process. > Conceptually, I understand what decimation is (low pass filtering and > then downsampling). However, how does this yield a multibit output? > i.e., how do the high rate of 1 bit outputs turn into a multi-bit > output?Let's stick with analog, since you have no trouble with that. Imagine your high-speed stream of 1s and -1s fed into an analog low-pass filter, and consider the output. There will clearly be a continuous signal that could in some cases exceed +/-1 by a little. It will in fact be a pretty good reconstruction of the original signal. Now feed the 1s and -1s into a digital filter instead and decimate its output. That is a sampled version of the analog filter's output. Jerry -- Engineering is the art of making what you want from things you can get. ¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯