QPSK carrier recovery problems

Hi all !!!
I am newbie to signal processing and I have to make QPSK modem. Here
are some basic parameters of this system:
- sampling frequency 18.5kHz
- carrier frequency 1.85kHz; carrier is synchronous with sampling
frequency
- symbol rate 1.85kS/s; every symbol starts with the same carrier
phase
- I/Q are shaped in baseband using 41tap FIR root rised cosine filter
(4 symbols involved: 2 earlier and 2 past) roll off factor value 0.24
- the same root rised cosine filter in receiver

I want to lock to carrier not longer than 100ms.

According to advice given in this newsgroup I try to recover carrier
using method utilizing 4th powering of incomining signal and then
locking to 4th carrier harmonic using PLL. After powering I can see
4th harmonic in resulting signal spectrum, but it is only couple of dB
above "information noise" and PLL has a lot of trouble with locking to
it. Adding bandpass filter before PLL doesn't improve situation much.
Any clues what is going on ? Maybe link to working solution ?

Best regards,
Adam Turowski


P.S. Earlier I have checked that PLL and it locks without problems to
clean carrier signal with AWGN (S/N=0dB).

> I want to lock to carrier not longer than 100ms.
Some erratas:
Above should be:
"PLL locking to carrier should not take longer than 100ms."

Sorry. My english in not perfect :-(

Adam Turowski

After some more experiments I can see that problem arise when RRC
pulse shaping is added to "clean" QPSK" modulation. RRC shaping slows
down sharp phase changes, which causes that only a little "information
component" content is removed by using 4th power method.

Can you advise a QPSK carrier recovery method suitable for signal with
RRC shaping ?
Clean QPSK signal is not acceptable according to audio channel
bandwidth limit.

Adam Turowski wrote:

   ...

> Sorry. My english in not perfect :-(

It is plenty good enough :-)

Jerry
-- 
Engineering is the art of making what you want from things you can get.
¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯

On Jul 4, 1:29 am, Adam Turowski <a...@ikp.pl> wrote:
> Hi all !!!
> I am newbie to signal processing and I have to make QPSK modem. Here
> are some basic parameters of this system:
> - sampling frequency 18.5kHz
> - carrier frequency 1.85kHz; carrier is synchronous with sampling
> frequency
> - symbol rate 1.85kS/s; every symbol starts with the same carrier
> phase
> - I/Q are shaped in baseband using 41tap FIR root rised cosine filter
> (4 symbols involved: 2 earlier and 2 past) roll off factor value 0.24
> - the same root rised cosine filter in receiver
>
> I want to lock to carrier not longer than 100ms.
>
> According to advice given in this newsgroup I try to recover carrier
> using method utilizing 4th powering of incomining signal and then
> locking to 4th carrier harmonic using PLL. After powering I can see
> 4th harmonic in resulting signal spectrum, but it is only couple of dB
> above "information noise" and PLL has a lot of trouble with locking to
> it. Adding bandpass filter before PLL doesn't improve situation much.
> Any clues what is going on ? Maybe link to working solution ?
>
> Best regards,
> Adam Turowski
>
> P.S. Earlier I have checked that PLL and it locks without problems to
> clean carrier signal with AWGN (S/N=0dB).

Why are you considering the 4th power for carrier recovery?

What is your objective here, to recover the carrier or to decode
the signal?

If your sampler is synchronized with the carrier signal, why are
you doing all this in the first place?  I don't understand.

How much clock and phase offset do you have in your system?
Just like most questions, it doesn't make much sense unless
you include this type of information.

Julius

Adam Turowski wrote:

> After some more experiments I can see that problem arise when RRC
> pulse shaping is added to "clean" QPSK" modulation. RRC shaping slows
> down sharp phase changes, which causes that only a little "information
> component" content is removed by using 4th power method.

This shows the weakness of your implementation of the carrier recovery. 
The 4th power PLL is neither better no worse compared to any other 
decision-indirected method.

> Can you advise a QPSK carrier recovery method suitable for signal with
> RRC shaping ?

My preference would be the decision directed carrier recovery. However 
it depends on the application.

> Clean QPSK signal is not acceptable according to audio channel
> bandwidth limit.

What exactly are you trying to accomplish as the final goal?

Vladimir Vassilevsky

DSP and Mixed Signal Design Consultant

http://www.abvolt.com

HI, thanks for your reply.

> Why are you considering the 4th power for carrier recovery?
>
I thought that blind synchronization method is the simplest way to
synchronize to carrier.
One of simplest blind methods is 4th power for QPSK signal. But it
seems that it doesn't
work well when you have RRC pulse shaping in baseband.

> What is your objective here, to recover the carrier or to decode
> the signal?
>
Of course my objective is to decode data. In my solution carrier phase
is synchronized
with timing in transmitter, so when I recover carrier, I also have
recovered timing.

> How much clock and phase offset do you have in your system?
> Just like most questions, it doesn't make much sense unless
> you include this type of information.
>
Here are parameters of all of the system:
- objective is to send digital data via semiduplex(one way only) audio
(300Hz-3000Hz@-3dB) channel, where  minimum S/N ratio is 10dB
- acceptable data rate is from 3.7 to 5 kbit/s with BER not worst than
1E-4. Given data rate parameter is acceptable in project architecture,
but after choosing transmission parameters, data rate will be fixed to
value from given range. Of course higher data rate value is better
because of transmission error correction possible in future
- transmitter and receiver are separate devices
- transmitter is put at the one end of channel, receiver at the other
- crystal oscillators running DSP parts in transmitter and receiver is
not synchronized to each other. Maximum difference between crystal
oscillator frequencies in transmitter is 500ppm.
- receiver synchronization to received signal must not take longer
than 150ms
- there could be some signal loss, but not longer than for 10ms and
not more often than 5 times per second
- transmitter power amplifier is linear.

According to above parameters I have chosen 1.85kS/s QPSK with
fcarrier=1.85kHz, RxADC/ TxDAC sampling freq=18.5kHz, RRC shaping beta
0.24: one filter in transmitter and one in receiver. Every symbol in
transmitter starts in the same phase of carrier. As I wrote above, I
thought that when I lock to a carrier, I will also lock to symbol
timing and voila - I know when sample the symbols. I have chosen this
because of simplicity of implementation.

Of course I am open on other modulation/implementation proposals.
Please advise.

Best regards,
Adam Turowski

What you said about "carrier is synchronous with sampling
frequency" is incorrect.

I think that what you have here is essentially an ultra-wideband
system, given that your bandwidth / carrier ratio is very high.
As such, the system is very sensitive to clock mismatches,
since the effect on "compressing" the symbols is more noticeable.

What I would recommend is what Vladimir said (use a decision-
directed system), and use a training sequence that is oversampled
to get a good initial estimate of the timing offset.  Forget carrier
recovery, I would try adjusting the symbol phase and timing (using
an interpolator) instead.

The higher-order carrier recovery method that you describe is good
for *narrowband* systems, but I like said you have a wideband
system.  If you want to learn more, look up synchronization
techniques for wideband communication systems.

When you tried the carrier recovery part using a single tone, well,
that is by definition a narrowband system.  And when you tried it
with modulation, it becomes a very wideband system and it failed.
If you are curious, try different symbol rates while keeping the
carrier
frequency the same, and see at what point your carrier recovery
system fails.

You said that you are building this based on what you read in this
newsgroup, which post are you referring to?

If you insist on carrier recovery, I would try to just explicitly
estimate
the clock offset between the two modems, because that way you can
use/improve the estimate in the next transmission.  From your post
it sounds like you only have one pair of transmitter and receiver, so
the
above will work fine.

Good luck,
Julius

On 5 Lip, 16:36, julius <juli...@gmail.com> wrote:
> What you said about "carrier is synchronous with sampling
> frequency" is incorrect.
>

> Adam Turowski wrote:
> "Every symbol in transmitter starts in the same phase of carrier. "

Maybe there is misunderstanding. I meant that in proposed modulation
architecture carrier is synchronous with symbol timing.

> The higher-order carrier recovery method that you describe is good
> for *narrowband* systems, but I like said you have a wideband
> system.  If you want to learn more, look up synchronization
> techniques for wideband communication systems.
>
Where can I find such materials ? I know that I should use Google, but
I am not
sure what methods/algoriths name should I look for. Please give me
some example.

> You said that you are building this based on what you read in this
> newsgroup, which post are you referring to?
For example:

http://groups.google.pl/group/comp.dsp/browse_thread/thread/dd246872d8caa353/1f6777fffb57f203?lnk=gst&q=4th+power&rnum=1&hl=pl#1f6777fffb57f203
- especially part of robert egri post

or
http://groups.google.pl/group/comp.dsp/browse_thread/thread/6601d405711e949/b332ecf18f91999d?lnk=gst&q=carrier+recovery+%5E4&rnum=3&hl=pl#b332ecf18f91999d
- this is about QPSK without pulse shaping

or
http://groups.google.pl/group/comp.dsp/browse_thread/thread/69e1c9310026ea6a/9661bea79f14902b?lnk=gst&q=carrier+recovery+%5E4&rnum=2&hl=pl#9661bea79f14902b
- this is about QAM, but close.

> If you insist on carrier recovery, I would try to just explicitly
> estimate
> the clock offset between the two modems, because that way you can
> use/improve the estimate in the next transmission.  From your post
> it sounds like you only have one pair of transmitter and receiver, so
> the
> above will work fine.
This is not the case. There is a lot of transmitters and receivers,
and they are using semiduplex channel. Semiduplex means that only one
way transmission at a time is possible. Every transmitter/receiver has
it's own crystal clock generator, so synchronization is required in
every new transmission. Hope that clears a little all situation.

Regards,
Adam Turowski

On Jul 6, 1:20 am, Adam Turowski <a...@ikp.pl> wrote:
>
> Where can I find such materials ? I know that I should use Google, but
> I am not
> sure what methods/algoriths name should I look for. Please give me
> some example.

No, you shouldn't use google, you should read books or papers :-).
First of all you should do some calculations to see how much
difficulty
you will have with your current system.  How much will the symbols
get compressed?

Often times, increasing your sampling rate can help with this issue.
For wideband systems, it is often advantageous to work with samples
at the higher rate (i.e. at the output of the ADC) instead of after
some
mixing and downsampling.

Think of it this way:  before digital methods became prevalent, people
would adjust the clock of the ADC to compensate for the clock offset.
This method is probably the "best" method for wideband system:  when
it's adjusted properly, the output of the ADC has none of this
stretching
that I mentioned.  Now what you want to do is try to do the same --
but
in the digital domain, and without having to adjust the clock of the
ADC.
For narrowband systems, you can see that this is easier.  In many
narrowband systems this can be done at 2-4 samples per symbol.

For wideband systems, it can be only slightly harder, but it can be
a lot harder.

I don't know any particular books that cover wideband synchronization,
but I know that this synchronization should be done at a higher rate,
closer to the ADC, farther from the constellation decoder.

Not sure if it will help, but I learned all this from d'Andrea and
Mengali's
book on synchronization.  It's very "old school" but all the
information is
there and that's how I learned about the many different methods.

At any rate, in the case that your problem is very difficult because
of the
parameters, in the worst case you can:
  a)  Send a training signal to get a good initial estimate.
  b)  Adjust the output of the ADC, possibly using decision-directed
       methods.  This can be done by re-sampling using the correct
       clock signal in the digital domain, by interpolation.

>
> > You said that you are building this based on what you read in this
> > newsgroup, which post are you referring to?
>
> For example:
>
> http://groups.google.pl/group/comp.dsp/browse_thread/thread/dd246872d...
> - especially part of robert egri post
>
> orhttp://groups.google.pl/group/comp.dsp/browse_thread/thread/6601d4057...
> - this is about QPSK without pulse shaping
>
> orhttp://groups.google.pl/group/comp.dsp/browse_thread/thread/69e1c9310...
> - this is about QAM, but close.
>

Fine, but those posts refer to people who are concerned about carrier
recovery.  Those posts give a valid method for that problem.  But if
your
ultimate goal is to decode the bits, then it may be better to do it
directly.
Otherwise your estimation errors will be propagated to the next parts.

Hope that helps,
Julius