noise of DDC/DUC implemented by CIC and FIR

Hi! can anyone give me some hints on how to handle with the noise of DDC/DUC design implemented by CIC and FIR? I have realized the function of DDC/DUC,but it comes out that the noise power is too high for my machine,and the noise analyzed in freq has a peak in the centre of each carrier.can anyone pls help me? thanks! Start a New Thread

Hi! can anyone give me some hints on how to handle with the noise of DDC/DUC design implemented by CIC and FIR? I have realized the function of DDC/DUC,but it comes out that the noise power is too high for my machine,and the noise analyzed in freq has a peak in the centre of each carrier.can anyone pls help me? thanks!

Just a guess but your sine you are using to down-convert might be noisy? Start a New Thread