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QPSK Simulink model

Started by alda...@ensieta.fr March 24, 2006
hello,
I'm new in that kind of mailing list and ,also, in DSP so if I ask for some stupid questions or I don't ask for things properly, I'm sorry.

I'm a student and I'm trying to develope a modulator-demodulator model to implant in a DSP plateform from ALTERA with a FPGA Stratix EP1S25F780C5.

In order to develope a model, and as I don't have experience, I'm following a tutorial from altera in which they use a model of QPSK modulator.

I don't understand a thing they do there, and I have asked them, but the answer they gave me wasn't as clear as I expected.

The problem is that they make a extrange mapping. All I have seen of mapping for QPSK modulation consist in transform information bits like that:

Bits Mapping(costellation in catesian coordenates)

00 (+1,+1)
01 (-1,+1)
11 (-1,-1)
10 (+1,-1)
but in the model that I'm following it makes the mapping like that:

Bits Mapping(costellation in catesian coordenates)

00 (1,0)
01 (0,1)
11 (3,0)
10 (0,3)

I don't know if that is another way of mapping that is commonly used, so I would like to know why they use that way of mapping, how does it work in comparison with the other way, and any other information that can help me.

I don't know if I'm asking for so much, so maybe somebody could tell me,just, where can I find information about that instead of anwsering the questions directly.

Thanks so much and bye.