I am trying to develop a small application for speech signal by using dsp56f801. One of the problem i am having is how to use PWM as a D/A convertor. My understanding of how the PWM work is as follow:  PWM in dsp56f801 has 15 bit resolution  PWM uses a counter to decided the pulse width (duty cycle)  0 means 0% and 32767 preresents 100%  the IPBus clock is 40MHz  Therefore, in order to keep all 15bits of resolution, the maximum PWM frequency is 40MHz/32767 = 1.2kHz If this is true, then I can't use this system for voice applications since the bandwidth for voice is at least 3kHz. Could some one correct me if i am wrong 

Use PWM D/A convertor
Started by ●November 23, 2004
Reply by ●November 24, 200420041124
You may use it for voice, however, you will not be able to use all 15
bits of resolution and product intelligible voice.
Generally voice systems run at 8Khz (giving 4kHz BW), which implies
that you can get on the order of
40Mhz/8kHz = 5000 steps = log2(5000) bits = 12.3 bits.
This gives a theoretical max SNR of about 70dB,
and is better than standard PCM which is 8 bits (~48dB SNR
max).
PCM has a better MOS than available to most, if not all, cell
phone codecs. It is probably a hair worse than a typcial CD
play.
Howard


Reply by ●November 25, 200420041125
Thanks Howard! Two more questions: If I could accept 12bits of resolution which is the resolution for ADC anyway, then I have to rescale all processed data to 12bits and use this scaled data to control the PWM duty cycle. I am wondering if this is crooect. Also, if 12bits resolution is used, the the PWM frequency is around 8kHz as you mentioned, then this PWM frequency is rather close to the frequencies of the speech signal. To avoid the interference between the two, I have to have very sharp low pass filter to minimize the 8kHz content. Please let me know if the statements above are correct. Thanks again for the help Shen  In , "Ebersman, Howard" <HEbersman@m...> wrote: > You may use it for voice, however, you will not be able to use all 15 bits > of resolution and product intelligible voice. > > Generally voice systems run at 8Khz (giving 4kHz BW), which implies that you > can get on the order of > 40Mhz/8kHz = 5000 steps = log2(5000) bits = 12.3 bits. > > This gives a theoretical max SNR of about 70dB, and is better than standard > PCM which is 8 bits (~48dB SNR max). > PCM has a better MOS than available to most, if not all, cell phone codecs. > It is probably a hair worse than a typcial CD play. > > Howard > > Original Message > From: haoyeshen [mailto:haoyeshen@y...] > Sent: Tuesday, November 23, 2004 5:35 PM > To: > Subject: [motoroladsp] Use PWM D/A convertor > > I am trying to develop a small application for speech signal by using > dsp56f801. One of the problem i am having is how to use PWM as a D/A > convertor. My understanding of how the PWM work is as follow: > >  PWM in dsp56f801 has 15 bit resolution >  PWM uses a counter to decided the pulse width (duty cycle) >  0 means 0% and 32767 preresents 100% >  the IPBus clock is 40MHz >  Therefore, in order to keep all 15bits of resolution, the maximum > PWM frequency is 40MHz/32767 = 1.2kHz > > If this is true, then I can't use this system for voice applications > since the bandwidth for voice is at least 3kHz. Could some one > correct me if i am wrong 
Reply by ●November 29, 200420041129
Rescaling of the signal in a DSP is easy stuff. If
tight on processing power, use the barrel shifter and a power of 2 scaling
of the original signal. If you have spare MIPS, a fractional
multiply will do it. The amount of scaling is a function of
You are correct that to avoid a fairly low sample
rate combined with the need for lots of filtering to average the signal
increases the filtering requirements. I'd expect that a 3 poll filter (using 1
op amp) would do the job, although more would reduce noise further. Typically,
the cutoff frequency is somewhere around 3kHz (rather than 4 kHz which is
the nyquist freq).
To make the work for the analog portion cheaper
and/or simpler, you can increase the sampling rate of the PWM. Doubling that
rate doubles the frequency of the sinc products making filtering much easier,
but you lose 1 bit of resolution (6 dBs of theoretical SNR). With a 16 kHz
PWM sample rate, you might even be able to get away with a 1 pole (RC) filter
with a 34kHz cutoff freq.
It it were me implementing this product, I would
simulate the PWM in Matlab to determine the required # of filter poles, cutoff
frequency, and to estimate the SNR of the real system. Typically, doing this
would take a day or two of effort, depending on experience and how hard you
are pushing the PWM. It is not impossible that this PWM will not meet your
needs, depending on the actual requirements, some of which you have omitted. If
this is the case, options include using a different DSP, using a CPLD external
to the processor, a DAC chip, etc.
Howard
