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Re[3]: DPRAM Interfac with 56F805

Started by Silvio Szafir March 8, 2001
Wednesday, March 07, 2001, 8:56:51 AM, you wrote:

MG> I have another query now. How did you interface the K(clock)
MG> signal of the MCM69D618/ MCM69D536. Is it the PLL clock out
MG> (CLKO)?

Mohan,

I used the same signal from the clock oscillators (EXTAL).

As I said in the last e-mail, I had tested it with diferent clock
frequencies ranging from 16 to 70 MHz, and all worked fine.

The problem isn't the K signal, but take a look at this memory
datasheet and pay attention to sync correctly the control signals,
like E1/E2, WX/WY, GX/GY and etcetera.

I had used the D536 version of this DPRAM just because people of
Motorola said at the time I were constructing my prototype that the
D618 model was with production problems and they couldn't supply me in
time. After that, I received the D618 model also ...

I strong recommend you to use the D618 model because it has twice
memory (for the same 1Mbit chip) and 19 bits of data pins, instead of
the 36 bits of the another one -- most of them not used in a 16 bits
DSP. Good luck in your project !
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Silvio Szafir E-mail:

Mechatronics
University of Sao Paulo
EPUSP - PMR

Av. Prof. Mello Moraes, 2231 Fone: +55 (11) 3818-5575
Cidade Universitaria ext.225
Sao Paulo, SP - Brasil
05508-900 Fax: +55 (11) 3813-1886

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