Forums

Re: Re: Nubbie DSPAUDIOEVM 56720 Pass Through distortion

Started by Johnny Chen September 18, 2009
Hi Christian,
I have verified passthru_720_upt.cmd with 720passthru_FTF_20070619 package on
720A EVM board. It does has output even I send command stepwise in GDS cmd
window. Please note for this version, jumpers of JP1 on the daughter board
should be all closed.

JP8: DEBUG Port closed
JP4: all "4114" are closed, others open
JP10: all closed

Daughter card:
JP15: two INT closed
JP1: all closed
JP3: all open
Jumpers on B, C, D, E, F, G, H, I, J, K, M, N, O, P, Q, T
SW1:Any mode are all OK.
SW2:N/A

AOUT1/AOUT2/AOUT3 are output from core0.
DB P4-7/9/11 <-> EVM DACB1-2/3-4/5-6, AOUT4/AOUT5/AOUT6 are output from
core1.

For difference between 725 and 720:
725 can support to 250MIPS while 720 can only support to 200MIPS.
720 has much more internal RAM than 725. For some memory size sensitive
algorithm, 720 is a better choice.
--
Best Regards.

Johnny Chen

2009/9/16 Johnny Chen

> Hi Christian,
>
> I will try 720passthru_FTF_20070619 stepwise to see whether we have any
> output signal. I have modified, please have a try on your side.
>
> ; passthru_720_upt.cmd
> device dv0 tms0 pos0
> device dv1 tms0 pos1
>
> force dv0..1 r
> force dv0..1 b
>
> device dv0
> wmemory p $0; 0..ffffff, pe, pi or pr depending upon address and omr value
> wregister core
> wasm
> change pc 0
>
> load passthru_core0.cld
> step
> step
>
> device dv1
> wmemory p $0; 0..ffffff, pe, pi or pr depending upon address and omr value
> wregister core
> wasm
> change pc 0
>
> load passthru_core1.cld
> step
> step
>
> go dv0..1
>
> ; following is for debugging run-timely.
> force dv0..1 b
> device dv0
> step
> step
> device dv1
> step
> step
> go dv0..1
> ...
>
> Please note that my jumpers setting are dedicated for E2PROM passthru. I
> think these new jumpers setting is not suitable
> for 720passthru_FTF_20070619. since in FTF version, all output clocks are in
> slave mode(TCCR = 0c0200), synced to input HCKR/SCKR/FSR, so JP1 and JP3 of
> DaughterBoard should be closed. However the E2PROM version's output clocks
> are all in master mode(TCCR = 0x6c0301)
>
> I have tried to use commands I showed in previous mail to debug and
> stepwise code boot loaded from E2PROM. It does works. Dsp can get output
> after "go dv0..1". Sometimes we might get noise output. I think it is caused
> by rx and tx async issue. You can see in the code there is no strict error
> handling mechanism for rx/tx ping-pong buffer sync recovering from stop
> state.
>
> I also tried another version which support passthru via both core0 and
> core1. It's not the version burned in E2PROM, also not the passthru you
> mentioned. Since this cld has included code of two cores, I just downloaded
> cld into core0. Set boot mode of core1 to mode 4. The commands I showed also
> work for this version, even if I stepwise in GDS tool, Dsp can get output
> after "go dv0..1"
> Best Regards.
>
> Johnny Chen
>
Hi Johnny,

today I retried debugging the '725 using your code example. The result is the same as with 720passthru_FTF_20070619: I can run the *.cmd scrips and get an audio signal. Typing the same commands in the debugger the aoutput gives a short noise and mutes. I also tried to connect all JP2 jumpers on the daughterboard, this worked once running the script (most times it produces noise) but my standard setting listed below is more reliable. This setting works both running the 720passthru_FTF_20070619 passthru_725.cmd file as the gds_720.cmd you forwarded to us.

Here are my jumper settings:

Motherboard (DSPAUDIOEVMMB1 Rev. B, SN. 0803M150):

JP1
TX1 4101
TX2 4101
TX3 4101
TX4 4114TX

JP2 TXSD4

JP3 none

JP4
RX1 4114
RX2 4114
RX3 4114
RX4 4114

JP5 all populated

JP6 RS232

JP7 Debug MPU

JP8 PPI port

JP9 Parallel

JP10 all populated

JP11 Aux2 and Aux5 (I use RX3 as SPDIF input)

DSPB725DB2E Daughterboard (populated with DSPB56725AF, SN-0825D038 Rev. B):

Osc Select: Int, Int

There is no JP1

JP2
HCKR0-HCKT0 closed
SCKR0-SCKT0 open
FSR0-FST0 open

If I close those two jumpers SCKR0-SCKT0 and FSR0-FST0 the output is noisy and/or distorted.

JP3
HCKR3-HCKT3 closed
SCKR3-SCKT3 open
FSR3-FST3 open

B1, E1, E2, H1, H2, J1, K2, K3, K6, K8, K10, K12, L1, L3, M2, M3, N1, N3, O1, P1, Q1, Q3, Q5, R2, S2, T1, T3, T5 closed, all other headers left open.

Any suggestions?

Best regards

Christian
> Hi Christian,
> I have verified passthru_720_upt.cmd with 720passthru_FTF_20070619 package
> on
> 720A EVM board. It does has output even I send command stepwise in GDS cmd
> window. Please note for this version, jumpers of JP1 on the daughter board
> should be all closed.
>
> JP8: DEBUG Port closed
> JP4: all "4114" are closed, others open
> JP10: all closed
>
> Daughter card:
> JP15: two INT closed
> • JP1: all closed
> • JP3: all open
> • Jumpers on B, C, D, E, F, G, H, I, J, K, M, N, O, P, Q, T
> SW1:Any mode are all OK.
> SW2:N/A
>
> AOUT1/AOUT2/AOUT3 are output from core0.
> DB P4-7/9/11 <-> EVM DACB1-2/3-4/5-6, AOUT4/AOUT5/AOUT6 are output from
> core1.
>
> For difference between 725 and 720:
> 725 can support to 250MIPS while 720 can only support to 200MIPS.
> 720 has much more internal RAM than 725. For some memory size sensitive
> algorithm, 720 is a better choice.
> --
> Best Regards.
>
> Johnny Chen
>
> 2009/9/16 Johnny Chen > Hi Christian,
> >
> > I will try 720passthru_FTF_20070619 stepwise to see whether we have any
> > output signal. I have modified, please have a try on your side.
> >
> > ; passthru_720_upt.cmd
> > device dv0 tms0 pos0
> > device dv1 tms0 pos1
> >
> > force dv0..1 r
> > force dv0..1 b
> >
> > device dv0
> > wmemory p $0; 0..ffffff, pe, pi or pr depending upon address and omr
> value
> > wregister core
> > wasm
> > change pc 0
> >
> > load passthru_core0.cld
> > step
> > step
> >
> > device dv1
> > wmemory p $0; 0..ffffff, pe, pi or pr depending upon address and omr
> value
> > wregister core
> > wasm
> > change pc 0
> >
> > load passthru_core1.cld
> > step
> > step
> >
> > go dv0..1
> >
> > ; following is for debugging run-timely.
> > force dv0..1 b
> > device dv0
> > step
> > step
> > device dv1
> > step
> > step
> > go dv0..1
> > ...
> >
> >
> >
> >
> >
> > Please note that my jumpers setting are dedicated for E2PROM passthru. I
> > think these new jumpers setting is not suitable
> > for 720passthru_FTF_20070619. since in FTF version, all output clocks
> are in
> > slave mode(TCCR = 0c0200), synced to input HCKR/SCKR/FSR, so JP1 and JP3
> of
> > DaughterBoard should be closed. However the E2PROM version's output
> clocks
> > are all in master mode(TCCR = 0x6c0301)
> >
> > I have tried to use commands I showed in previous mail to debug and
> > stepwise code boot loaded from E2PROM. It does works. Dsp can get output
> > after "go dv0..1". Sometimes we might get noise output. I think it is
> caused
> > by rx and tx async issue. You can see in the code there is no strict
> error
> > handling mechanism for rx/tx ping-pong buffer sync recovering from stop
> > state.
> >
> > I also tried another version which support passthru via both core0 and
> > core1. It's not the version burned in E2PROM, also not the passthru you
> > mentioned. Since this cld has included code of two cores, I just
> downloaded
> > cld into core0. Set boot mode of core1 to mode 4. The commands I showed
> also
> > work for this version, even if I stepwise in GDS tool, Dsp can get
> output
> > after "go dv0..1"
> >
> >
> > Best Regards.
> >
> > Johnny Chen
> >
> >>
> >>
Hi Christian,
I tried 720passthru_FTF_20070619 with passthru_720.cmd on 725 RevB DB. I
step commands and system run properly.

Your jumper setting are not correct for this demo version. Please note Rx
and Tx clock are all set to slave mode, sync to input clocks since RCCR_1 TCCR = TCCR_3 = 0C0200, so F1, F2 should be closed.

AOUT1/AOUT2/AOUT3 are output from core0(ESAI).
AOUT4/AOUT5/AOUT6 are output from core1(ESAI_3).

I list my working settings below for you reference. This setting is
only available for 720passthru_FTF_20070619. It cannot support
Core0-dualcore-Passthru.

JP1
TX1 4101
TX2 4101
TX3 4101
TX4 4114TX ==> TX4 4104T

JP2 TXSD4

JP3 none

JP4
RX1 4114
RX2 4114
RX3 4114
RX4 4114

JP5 all populated

JP6 RS232

JP7 Debug MPU

JP8 PPI port

JP9 Parallel

JP10 all populated

JP11 Aux2 and Aux5 (I use RX3 as SPDIF input)

DSPB725DB2E Daughterboard (populated with DSPB56725AF, SN-0825D038 Rev. B):

Osc Select: Int, Int

There is no JP1

JP2
HCKR0-HCKT0 closed
SCKR0-SCKT0 open ==> Closed
FSR0-FST0 open ==> Closed

JP3
HCKR3-HCKT3 closed ==> Open
SCKR3-SCKT3 open
FSR3-FST3 open

B1, E1, E2, H1, H2, J1, K2, K3, K6, K8, K10, K12, L1, L3, M2, M3, N1, N3,
O1, P1, Q1, Q3, Q5, R2, S2, T1, T3, T5 closed, all other headers left open.

==> B1, E1, E2, F1, F2, H1, H2, J1, K2, K4, K6, K8, L1, L3, M2, M3, N1, N3,
O1, P1, Q1, Q3, Q5, R2, S2, T2, T4, T6 closed,
all other headers left open.
--
Best Regards.

Johnny Chen
Hi Johnny,

you are right, this jumper setting fixes the stepwise running debugger problem using the 720passthru_FTF_20070619 code example.

Jumper 1 TX4104T setting doesn't exist, I used 4114TX to output a signal to TX4. All other jumper settings should be used according to your table to get a signal on all analog and digital outputs.

These jumper settings are not compatible to the code example stored in the E2PROM unfortunately. So you have to rejumper the daughterboard to boot the device from the PROM otherwise the loss of sync causes distorted noise on the outputs. I hope I do not forget this when using the dual core next time...

With these jumper settings both the original command file as well as your modified file work stepwise. Unfortunately they did not run using the script but you cannot have the cace and eat it too...

For the moment the issue seems to be fixed even if the solution is not perfect.

Best regards

Christian
> Hi Christian,
> I tried 720passthru_FTF_20070619 with passthru_720.cmd on 725 RevB DB. I
> step commands and system run properly.
>
> Your jumper setting are not correct for this demo version. Please note Rx
> and Tx clock are all set to slave mode, sync to input clocks since RCCR_1
> > TCCR = TCCR_3 = 0C0200, so F1, F2 should be closed.
>
> AOUT1/AOUT2/AOUT3 are output from core0(ESAI).
> AOUT4/AOUT5/AOUT6 are output from core1(ESAI_3).
>
> I list my working settings below for you reference. This setting is
> only available for 720passthru_FTF_20070619. It cannot support
> Core0-dualcore-Passthru.
>
> JP1
> TX1 4101
> TX2 4101
> TX3 4101
> TX4 4114TX ==> TX4 4104T
>
> JP2 TXSD4
>
> JP3 none
>
> JP4
> RX1 4114
> RX2 4114
> RX3 4114
> RX4 4114
>
> JP5 all populated
>
> JP6 RS232
>
> JP7 Debug MPU
>
> JP8 PPI port
>
> JP9 Parallel
>
> JP10 all populated
>
> JP11 Aux2 and Aux5 (I use RX3 as SPDIF input)
>
> DSPB725DB2E Daughterboard (populated with DSPB56725AF, SN-0825D038 Rev.
> B):
>
> Osc Select: Int, Int
>
> There is no JP1
>
> JP2
> HCKR0-HCKT0 closed
> SCKR0-SCKT0 open ==> Closed
> FSR0-FST0 open ==> Closed
>
> JP3
> HCKR3-HCKT3 closed ==> Open
> SCKR3-SCKT3 open
> FSR3-FST3 open
>
> B1, E1, E2, H1, H2, J1, K2, K3, K6, K8, K10, K12, L1, L3, M2, M3, N1, N3,
> O1, P1, Q1, Q3, Q5, R2, S2, T1, T3, T5 closed, all other headers left
> open.
>
> ==> B1, E1, E2, F1, F2, H1, H2, J1, K2, K4, K6, K8, L1, L3, M2, M3, N1,
> N3,
> O1, P1, Q1, Q3, Q5, R2, S2, T2, T4, T6 closed,
> all other headers left open.
> --
> Best Regards.
>
> Johnny Chen