Forums

Any timing problem of using LCX16245 to drive the Data and address pins of 56805 ??

Started by Gonggh October 5, 2002
Hi all.
When building my own 56805 board, I would add two LCX16245 to drive the
56805's address and data signals, will these cause any problem to the external
bus timing. LCX16245 has a delay time from 1.5ns to 4.5ns, can 56805 sustain
this delay?
Or, is it necessary to add these two LCX16245 for 5-6 devices connected on
the address and data signals?
Thanks.

gonggh




This is not a problem, the external memory interface can be set up for 0, 4, 8,
or 12 wait states. You just need to add up all the propagation delays, access
times, etc. and set the number of wait states accordingly. Please see Chapter 6
"External Memory Interface" in the DSP56F80x User's Manual.

Regards,

Art Johnson
Senior Systems Analyst
PMC Prime Mover Controls Inc.
3600 Gilmore Way
Burnaby, B.C., Canada
V5G 4R8
Phone: 604 433-4644
FAX: 604 433-5570
Email:
http://www.pmc-controls.com
-----Original Message-----
From: Gonggh [mailto:]
Sent: Friday, October 04, 2002 10:45 PM
To:
Subject: [motoroladsp] Any timing problem of using LCX16245 to drive the
Data and address pins of 56805 ?? Hi all. When building my own 56805 board, I would add two LCX16245 to drive the
56805's address and data signals, will these cause any problem to the external
bus timing. LCX16245 has a delay time from 1.5ns to 4.5ns, can 56805 sustain
this delay? Or, is it necessary to add these two LCX16245 for 5-6 devices connected on
the address and data signals? Thanks. gonggh

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But actually, I don't want to slow down all my external divices, such as the
data ram.
In my prototype, I have changed the wait states of DS to 4 clocks when visiting
some slow-speed devices, but full speed when using external data ram.

-----原始邮件-----
发件人: Art Johnson [mailto:]
发送时间: 2002年10月7日 22:22
收件人: Gonggh;
主题: RE: [motoroladsp] Any timing problem of using LCX16245 to drive the Data
and address pins of 56805 ?? This is not a problem, the external memory interface can be set up for 0, 4, 8,
or 12 wait states. You just need to add up all the propagation delays, access
times, etc. and set the number of wait states accordingly. Please see Chapter 6
"External Memory Interface" in the DSP56F80x User's Manual.

Regards,

Art Johnson
Senior Systems Analyst
PMC Prime Mover Controls Inc.
3600 Gilmore Way
Burnaby, B.C., Canada
V5G 4R8
Phone: 604 433-4644
FAX: 604 433-5570
Email:
http://www.pmc-controls.com
-----Original Message-----
From: Gonggh [mailto:]
Sent: Friday, October 04, 2002 10:45 PM
To:
Subject: [motoroladsp] Any timing problem of using LCX16245 to drive the
Data and address pins of 56805 ?? Hi all. When building my own 56805 board, I would add two LCX16245 to drive the
56805's address and data signals, will these cause any problem to the external
bus timing. LCX16245 has a delay time from 1.5ns to 4.5ns, can 56805 sustain
this delay? Or, is it necessary to add these two LCX16245 for 5-6 devices connected on
the address and data signals? Thanks. gonggh
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_____________________________________
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message will receive your answer. You need to do a "reply all" if you want your
answer to be distributed to the entire group.

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That's OK, we do the same thing (ie use a different number of wait states for
different external devices). You will, however, need to select some extremely
fast RAMs (calculations below assume 80MHz Zclk):

Write access time from address valid to end of write pulse:
= Tawr + Twr
= 6.5ns + 7.5ns
= 14.0ns
Subtract the worst-case "extra" delays from the LCX16245 devices:
= 14.0ns - ( 2 * 4.5ns )
= 14.0ns - 9.0ns
= 5.0ns
The above assumes no other delays (eg address decoding) in the system

Read access time from address valid to end of read pulse:
= Tardd
= 18.7ns
Subtract the worst-case "extra" delays from the LCX16245 devices:
= 18.7ns - ( 2 * 4.5ns )
= 18.7ns - 9.0ns
= 9.7ns
The above assumes no other delays (eg address decoding) in the system

If you do have other delays such as address decode delays, you may find that you
have to buy extremely fast and expensive RAM devices to achieve zero-wait-state
operation.

According to the DSP56F807 Data Sheet (DSP56F807/D, Rev. 7.0, 1/2002), you will
need to use external buffers only if your worst-case load capacitance on the bus
exceeds 50pF (see 3.6 "External Bus Asynchronous Timing").

Regards,

Art Johnson
Senior Systems Analyst
PMC Prime Mover Controls Inc.
3600 Gilmore Way
Burnaby, B.C., Canada
V5G 4R8
Phone: 604 433-4644
FAX: 604 433-5570
Email:
http://www.pmc-controls.com

-----Original Message-----
From: Gonggh [mailto:]
Sent: Monday, October 07, 2002 9:24 AM
To: Art Johnson;
Subject: ??: [motoroladsp] Any timing problem of using LCX16245 to drive
the Data and address pins of 56805 ??
But actually, I don't want to slow down all my external divices, such as the
data ram.
In my prototype, I have changed the wait states of DS to 4 clocks when visiting
some slow-speed devices, but full speed when using external data ram.

-----原始邮件-----
发件人: Art Johnson [mailto:]
发送时间: 2002年10月7日 22:22
收件人: Gonggh;
主题: RE: [motoroladsp] Any timing problem of using LCX16245 to drive the Data
and address pins of 56805 ?? This is not a problem, the external memory interface can be set up for 0, 4, 8,
or 12 wait states. You just need to add up all the propagation delays, access
times, etc. and set the number of wait states accordingly. Please see Chapter 6
"External Memory Interface" in the DSP56F80x User's Manual.

Regards,

Art Johnson
Senior Systems Analyst
PMC Prime Mover Controls Inc.
3600 Gilmore Way
Burnaby, B.C., Canada
V5G 4R8
Phone: 604 433-4644
FAX: 604 433-5570
Email:
http://www.pmc-controls.com
-----Original Message-----
From: Gonggh [mailto:]
Sent: Friday, October 04, 2002 10:45 PM
To:
Subject: [motoroladsp] Any timing problem of using LCX16245 to drive the
Data and address pins of 56805 ?? Hi all. When building my own 56805 board, I would add two LCX16245 to drive the
56805's address and data signals, will these cause any problem to the external
bus timing. LCX16245 has a delay time from 1.5ns to 4.5ns, can 56805 sustain
this delay? Or, is it necessary to add these two LCX16245 for 5-6 devices connected on
the address and data signals? Thanks. gonggh
------------------------ Yahoo! Groups Sponsor ---------------------~-->
4 DVDs Free +s&p Join Now
http://us.click.yahoo.com/pt6YBB/NXiEAA/MVfIAA/PNArlB/TM
---------------------------------~->

_____________________________________
Note: If you do a simple "reply" with your email client, only the author of this
message will receive your answer. You need to do a "reply all" if you want your
answer to be distributed to the entire group.

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Hi
I have finished my board with two LCX16245 installed, hoping that I can
modify the wait state to fit the delay of LCX16245 and some external address
decoder. And I found I really need to do this for my RAM is not as fast as I
expect.
When I disable the external address decoder, connect the CS signal of
external RAM to GND, everything is OK and I can download and debug my program
well. When I enable the decoder, the downloading and debugging are unsteady,
always crashed! I think the bus delay from LCX16245 and address decoder is too
long and I need to change the wait state of external data and program.
The question is that how can I modified this wait state before I download
the program and debug it. It is useless to do this in my program and must be
somewhere in linker.cmd file, am I right? If so , how to achieve this?
Thanks.
gonggh -----原始邮件-----
发件人: Art Johnson [mailto:]
发送时间: 2002年10月8日 0:55
收件人: Gonggh;
主题: RE: [motoroladsp] Any timing problem of using LCX16245 to drive
the Data and address pins of 56805 ?? That's OK, we do the same thing (ie use a different number of wait states for
different external devices). You will, however, need to select some extremely
fast RAMs (calculations below assume 80MHz Zclk):

Write access time from address valid to end of write pulse:
= Tawr + Twr
= 6.5ns + 7.5ns
= 14.0ns
Subtract the worst-case "extra" delays from the LCX16245 devices:
= 14.0ns - ( 2 * 4.5ns )
= 14.0ns - 9.0ns
= 5.0ns
The above assumes no other delays (eg address decoding) in the system

Read access time from address valid to end of read pulse:
= Tardd
= 18.7ns
Subtract the worst-case "extra" delays from the LCX16245 devices:
= 18.7ns - ( 2 * 4.5ns )
= 18.7ns - 9.0ns
= 9.7ns
The above assumes no other delays (eg address decoding) in the system

If you do have other delays such as address decode delays, you may find that you
have to buy extremely fast and expensive RAM devices to achieve zero-wait-state
operation.

According to the DSP56F807 Data Sheet (DSP56F807/D, Rev. 7.0, 1/2002), you will
need to use external buffers only if your worst-case load capacitance on the bus
exceeds 50pF (see 3.6 "External Bus Asynchronous Timing").

Regards,

Art Johnson
Senior Systems Analyst
PMC Prime Mover Controls Inc.
3600 Gilmore Way
Burnaby, B.C., Canada
V5G 4R8
Phone: 604 433-4644
FAX: 604 433-5570
Email:
http://www.pmc-controls.com

-----Original Message-----
From: Gonggh [mailto:]
Sent: Monday, October 07, 2002 9:24 AM
To: Art Johnson;
Subject: ??: [motoroladsp] Any timing problem of using LCX16245 to drive
the Data and address pins of 56805 ??
But actually, I don't want to slow down all my external divices, such as the
data ram.
In my prototype, I have changed the wait states of DS to 4 clocks when visiting
some slow-speed devices, but full speed when using external data ram.

-----ԭʼ -----
: Art Johnson [mailto:]
ʱ: 2002 10 7 22:22
ռ : Gonggh;
: RE: [motoroladsp] Any timing problem of using LCX16245 to drive the Data and
address pins of 56805 ?? This is not a problem, the external memory interface can be set up for 0, 4, 8,
or 12 wait states. You just need to add up all the propagation delays, access
times, etc. and set the number of wait states accordingly. Please see Chapter 6
"External Memory Interface" in the DSP56F80x User's Manual.

Regards,

Art Johnson
Senior Systems Analyst
PMC Prime Mover Controls Inc.
3600 Gilmore Way
Burnaby, B.C., Canada
V5G 4R8
Phone: 604 433-4644
FAX: 604 433-5570
Email:
http://www.pmc-controls.com
-----Original Message-----
From: Gonggh [mailto:]
Sent: Friday, October 04, 2002 10:45 PM
To:
Subject: [motoroladsp] Any timing problem of using LCX16245 to drive the
Data and address pins of 56805 ?? Hi all. When building my own 56805 board, I would add two LCX16245 to drive the
56805's address and data signals, will these cause any problem to the external
bus timing. LCX16245 has a delay time from 1.5ns to 4.5ns, can 56805 sustain
this delay? Or, is it necessary to add these two LCX16245 for 5-6 devices connected on
the address and data signals? Thanks. gonggh
------------------------ Yahoo! Groups Sponsor ---------------------~-->
4 DVDs Free +s&p Join Now
http://us.click.yahoo.com/pt6YBB/NXiEAA/MVfIAA/PNArlB/TM
---------------------------------~->

_____________________________________
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message will receive your answer. You need to do a "reply all" if you want your
answer to be distributed to the entire group.

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What you need to do is to place the following lines into the "appconfig.h" file
for each build target of your project: /****************************************************************************
*
* CORE Initialization
*
* (definitions from the SDK file "coredrv.h")
*
****************************************************************************/
/* Bus configuration */

#define BUS_CONTROL_DRV_BIT_0 0x0000
#define BUS_CONTROL_DRV_BIT_1 0x0200

#define BUS_CONTROL_EXT_X_MEM_WAIT_STATES 12

#define BUS_CONTROL_EXT_P_MEM_WAIT_STATES 12

#define BUS_CONTROL_REG ( BUS_CONTROL_DRV_BIT_1 \
| (BUS_CONTROL_EXT_X_MEM_WAIT_STATES << 4) \
| BUS_CONTROL_EXT_P_MEM_WAIT_STATES ) The above example sets the external X and P memory accesses to use 12 wait
states. You can set either of these values to be 0, 4, 8, or 12 wait states as
determined by the total delay in your system. Simply add up the worst-case
access time of the RAM chip, plus the delays caused by the LCX16245 chips and
the address decoder. Just to be on the safe side, we also add another 5-10ns to
the total. This total can then be converted to the number of wait states that
are required.

I hope this helps to solve your problem.

Regards,

Art Johnson
Senior Systems Analyst
PMC Prime Mover Controls Inc.
3600 Gilmore Way
Burnaby, B.C., Canada
V5G 4R8
Phone: 604 433-4644
FAX: 604 433-5570
Email:
http://www.pmc-controls.com

-----Original Message-----
From: Gonggh [mailto:]
Sent: Tuesday, October 29, 2002 8:59 AM
To:
Subject: ??: [motoroladsp] Any timing problem of using LCX16245 to drive
the Data and address pins of 56805 ?? Hi
I have finished my board with two LCX16245 installed, hoping that I can
modify the wait state to fit the delay of LCX16245 and some external address
decoder. And I found I really need to do this for my RAM is not as fast as I
expect.
When I disable the external address decoder, connect the CS signal of
external RAM to GND, everything is OK and I can download and debug my program
well. When I enable the decoder, the downloading and debugging are unsteady,
always crashed! I think the bus delay from LCX16245 and address decoder is too
long and I need to change the wait state of external data and program.
The question is that how can I modified this wait state before I download
the program and debug it. It is useless to do this in my program and must be
somewhere in linker.cmd file, am I right? If so , how to achieve this?
Thanks.
gonggh -----原始邮件-----
发件人: Art Johnson [mailto:]
发送时间: 2002年10月8日 0:55
收件人: Gonggh;
主题: RE: [motoroladsp] Any timing problem of using LCX16245 to drive
the Data and address pins of 56805 ?? That's OK, we do the same thing (ie use a different number of wait states for
different external devices). You will, however, need to select some extremely
fast RAMs (calculations below assume 80MHz Zclk):

Write access time from address valid to end of write pulse:
= Tawr + Twr
= 6.5ns + 7.5ns
= 14.0ns
Subtract the worst-case "extra" delays from the LCX16245 devices:
= 14.0ns - ( 2 * 4.5ns )
= 14.0ns - 9.0ns
= 5.0ns
The above assumes no other delays (eg address decoding) in the system

Read access time from address valid to end of read pulse:
= Tardd
= 18.7ns
Subtract the worst-case "extra" delays from the LCX16245 devices:
= 18.7ns - ( 2 * 4.5ns )
= 18.7ns - 9.0ns
= 9.7ns
The above assumes no other delays (eg address decoding) in the system

If you do have other delays such as address decode delays, you may find that you
have to buy extremely fast and expensive RAM devices to achieve zero-wait-state
operation.

According to the DSP56F807 Data Sheet (DSP56F807/D, Rev. 7.0, 1/2002), you will
need to use external buffers only if your worst-case load capacitance on the bus
exceeds 50pF (see 3.6 "External Bus Asynchronous Timing").

Regards,

Art Johnson
Senior Systems Analyst
PMC Prime Mover Controls Inc.
3600 Gilmore Way
Burnaby, B.C., Canada
V5G 4R8
Phone: 604 433-4644
FAX: 604 433-5570
Email:
http://www.pmc-controls.com

-----Original Message-----
From: Gonggh [mailto:]
Sent: Monday, October 07, 2002 9:24 AM
To: Art Johnson;
Subject: ??: [motoroladsp] Any timing problem of using LCX16245 to drive
the Data and address pins of 56805 ??
But actually, I don't want to slow down all my external divices, such as the
data ram.
In my prototype, I have changed the wait states of DS to 4 clocks when visiting
some slow-speed devices, but full speed when using external data ram.

-----ԭʼ -----
: Art Johnson [mailto:]
ʱ: 2002 10 7 22:22
ռ : Gonggh;
: RE: [motoroladsp] Any timing problem of using LCX16245 to drive the Data and
address pins of 56805 ?? This is not a problem, the external memory interface can be set up for 0, 4, 8,
or 12 wait states. You just need to add up all the propagation delays, access
times, etc. and set the number of wait states accordingly. Please see Chapter 6
"External Memory Interface" in the DSP56F80x User's Manual.

Regards,

Art Johnson
Senior Systems Analyst
PMC Prime Mover Controls Inc.
3600 Gilmore Way
Burnaby, B.C., Canada
V5G 4R8
Phone: 604 433-4644
FAX: 604 433-5570
Email:
http://www.pmc-controls.com
-----Original Message-----
From: Gonggh [mailto:]
Sent: Friday, October 04, 2002 10:45 PM
To:
Subject: [motoroladsp] Any timing problem of using LCX16245 to drive the
Data and address pins of 56805 ?? Hi all. When building my own 56805 board, I would add two LCX16245 to drive the
56805's address and data signals, will these cause any problem to the external
bus timing. LCX16245 has a delay time from 1.5ns to 4.5ns, can 56805 sustain
this delay? Or, is it necessary to add these two LCX16245 for 5-6 devices connected on
the address and data signals? Thanks. gonggh
------------------------ Yahoo! Groups Sponsor ---------------------~-->
4 DVDs Free +s&p Join Now
http://us.click.yahoo.com/pt6YBB/NXiEAA/MVfIAA/PNArlB/TM
---------------------------------~->

_____________________________________
Note: If you do a simple "reply" with your email client, only the author of this
message will receive your answer. You need to do a "reply all" if you want your
answer to be distributed to the entire group.

_____________________________________
About this discussion group:

To Join:

To Post:

To Leave:

Archives: http://www.yahoogroups.com/group/motoroladsp

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YES, it works well now. Thanks.
These settings must be excute both before downloading
and running, am I right?
And by this way, I can set any CPU core register
before my program start to excute, the SDK will do
this for me. Right?

gonggh --- Art Johnson <> ģ> What
you need to do is to place the following lines
> into the "appconfig.h" file for each build target of
> your project: >
/****************************************************************************
> *
> * CORE Initialization
> *
> * (definitions from the SDK file "coredrv.h")
> *
>
****************************************************************************/
> /* Bus configuration */
>
> #define BUS_CONTROL_DRV_BIT_0 0x0000
> #define BUS_CONTROL_DRV_BIT_1 0x0200
>
> #define BUS_CONTROL_EXT_X_MEM_WAIT_STATES 12
>
> #define BUS_CONTROL_EXT_P_MEM_WAIT_STATES 12
>
> #define BUS_CONTROL_REG (
> BUS_CONTROL_DRV_BIT_1 \
> |
> (BUS_CONTROL_EXT_X_MEM_WAIT_STATES << 4) \
> |
> BUS_CONTROL_EXT_P_MEM_WAIT_STATES ) > The above example sets the external X and P memory
> accesses to use 12 wait states. You can set either
> of these values to be 0, 4, 8, or 12 wait states as
> determined by the total delay in your system.
> Simply add up the worst-case access time of the RAM
> chip, plus the delays caused by the LCX16245 chips
> and the address decoder. Just to be on the safe
> side, we also add another 5-10ns to the total. This
> total can then be converted to the number of wait
> states that are required.
>
> I hope this helps to solve your problem.
>
> Regards,
>
> Art Johnson
> Senior Systems Analyst
> PMC Prime Mover Controls Inc.
> 3600 Gilmore Way
> Burnaby, B.C., Canada
> V5G 4R8
> Phone: 604 433-4644
> FAX: 604 433-5570
> Email:
> http://www.pmc-controls.com >
>
> -----Original Message-----
> From: Gonggh [mailto:]
> Sent: Tuesday, October 29, 2002 8:59 AM
> To:
> Subject: ??: [motoroladsp] Any timing problem of
> using LCX16245 to drive
> the Data and address pins of 56805 ?? > Hi
> I have finished my board with two LCX16245
> installed, hoping that I can modify the wait state
> to fit the delay of LCX16245 and some external
> address decoder. And I found I really need to do
> this for my RAM is not as fast as I expect.
> When I disable the external address decoder,
> connect the CS signal of external RAM to GND,
> everything is OK and I can download and debug my
> program well. When I enable the decoder, the
> downloading and debugging are unsteady, always
> crashed! I think the bus delay from LCX16245 and
> address decoder is too long and I need to change the
> wait state of external data and program.
> The question is that how can I modified this
> wait state before I download the program and debug
> it. It is useless to do this in my program and must
> be somewhere in linker.cmd file, am I right? If so
> , how to achieve this?
> Thanks.
> gonggh > -----原始邮件-----
> 发件 Art Johnson [mailto:]
> 发送时 200200:55
> 收件 Gonggh;
> 主题: RE: [motoroladsp] Any timing problem of
> using LCX16245 to drive
> the Data and address pins of 56805 ?? > That's OK, we do the same thing (ie use a different
> number of wait states for different external
> devices). You will, however, need to select some
> extremely fast RAMs (calculations below assume 80MHz
> Zclk):
>
> Write access time from address valid to end of write
> pulse:
> = Tawr + Twr
> = 6.5ns + 7.5ns
> = 14.0ns
> Subtract the worst-case "extra" delays from the
> LCX16245 devices:
> = 14.0ns - ( 2 * 4.5ns )
> = 14.0ns - 9.0ns
> = 5.0ns
> The above assumes no other delays (eg address
> decoding) in the system
>
> Read access time from address valid to end of read
> pulse:
> = Tardd
> = 18.7ns
> Subtract the worst-case "extra" delays from the
> LCX16245 devices:
> = 18.7ns - ( 2 * 4.5ns )
> = 18.7ns - 9.0ns
> = 9.7ns
> The above assumes no other delays (eg address
> decoding) in the system
>
> If you do have other delays such as address decode
> delays, you may find that you have to buy extremely
> fast and expensive RAM devices to achieve
> zero-wait-state operation.
>
> According to the DSP56F807 Data Sheet (DSP56F807/D,
> Rev. 7.0, 1/2002), you will need to use external
> buffers only if your worst-case load capacitance on
> the bus exceeds 50pF (see 3.6 "External Bus
> Asynchronous Timing").
>
> Regards,
>
> Art Johnson
> Senior Systems Analyst
> PMC Prime Mover Controls Inc.
> 3600 Gilmore Way
> Burnaby, B.C., Canada
> V5G 4R8
> Phone: 604 433-4644
> FAX: 604 433-5570
> Email:
> http://www.pmc-controls.com >
>
> -----Original Message-----
> From: Gonggh [mailto:]
> Sent: Monday, October 07, 2002 9:24 AM
> To: Art Johnson;
> Subject: ??: [motoroladsp] Any timing problem of
> using LCX16245 to drive
> the Data and address pins of 56805 ?? >
> But actually, I don't want to slow down all my
> external divices, such as the data ram.
> In my prototype, I have changed the wait states of
> DS to 4 clocks when visiting some slow-speed
> devices, but full speed when using external data
> ram.
>
> -----ԭʼ -----
> : Art Johnson [mailto:]
> ʱ: 2002 10 7 22:22
> ռ : Gonggh;
> : RE: [motoroladsp] Any timing problem of using
> LCX16245 to drive the Data and address pins of 56805
> ?? > This is not a problem, the external memory interface
> can be set up for 0, 4, 8, or 12 wait states. You
> just need to add up all the propagation delays,
> access times, etc. and set the number of wait states
> accordingly. Please see Chapter 6 "External Memory
> Interface" in the DSP56F80x User's Manual.
>
> Regards,
>
> Art Johnson
> Senior Systems Analyst
> PMC Prime Mover Controls Inc.
> 3600 Gilmore Way
> Burnaby, B.C., Canada
> V5G 4R8
> Phone: 604 433-4644
> FAX: 604 433-5570
> Email:
>
=== message truncated ===

_________________________________________________________



The #defines in your "appconfig.h" file allow you to specify the initial values
for most of the on-chip peripherals (ADCs, PWMs, GPIOs, Quad Timers, etc.), plus
the following "Core" registers:
1) Bus Control Register (BCR)
2) Interrupt Priority Register (IPR)

The Bus Control Register (BCR) is set as described in my last email. The
Interrupt Priority Register (IPR) is set as follows (an example from the
"appconfig.h" file from one of our systems):

/* Interrupt Priority configuration */
#define INTERRUPT_PRIORITY_REG ( IPR_ENABLE_CHANNEL_0 \
| IPR_ENABLE_CHANNEL_1 \
| IPR_ENABLE_CHANNEL_2 \
| IPR_ENABLE_CHANNEL_3 \
| IPR_ENABLE_CHANNEL_4 \
| IPR_ENABLE_CHANNEL_5 \
| IPR_ENABLE_CHANNEL_6 \
/* | IPR_ENABLE_IRQA */ \
/* | IPR_ENABLE_IRQB */ \
/* | IPR_IRQA_TRIGGER_HIGH_LEVEL */ \
/* | IPR_IRQB_TRIGGER_HIGH_LEVEL */ ) // IRQA and IRQB must remain disabled until the XR16C2850 DUART
// chip has been initialized and is driving the IRQA and IRQB
// lines to the "inactive" level.
#define IPR_IRQA_ENABLE_BITS ( IPR_ENABLE_IRQA \
| IPR_IRQA_TRIGGER_HIGH_LEVEL )

#define IPR_IRQB_ENABLE_BITS ( IPR_ENABLE_IRQB \
| IPR_IRQB_TRIGGER_HIGH_LEVEL ) The following registers are NOT set by the #defines in your "appconfig.h" file:
a) The Data ALU Registers (X0, Y0, Y1, A, B)
b) The AGU Registers (R0, R1, R2, R3, SP, N, M01)
c) The Program Controller Unit Registers (PC, HWS, SR, OMR, LC, LA) (except
that some bits in the SR and OMR may be set implicitly from your definitions)

All of this is described in great detail in the Motorola SDK on-line
documentation, please look there for any further information you may require.

Regards,

Art Johnson
Senior Systems Analyst
PMC Prime Mover Controls Inc.
3600 Gilmore Way
Burnaby, B.C., Canada
V5G 4R8
Phone: 604 433-4644
FAX: 604 433-5570
Email:
http://www.pmc-controls.com

-----Original Message-----
From: gh gong [mailto:]
Sent: Wednesday, October 30, 2002 10:17 AM
To: Art Johnson; Gonggh;
Subject: RE: [motoroladsp] Any timing problem of using LCX16245 to drive the
Data and address pins of 56805 ?? YES, it works well now. Thanks.
These settings must be excute both before downloading
and running, am I right?
And by this way, I can set any CPU core register
before my program start to excute, the SDK will do
this for me. Right?

gonggh --- Art Johnson <> ģ> What
you need to do is to place the following lines
> into the "appconfig.h" file for each build target of
> your project: >
/****************************************************************************
> *
> * CORE Initialization
> *
> * (definitions from the SDK file "coredrv.h")
> *
>
****************************************************************************/
> /* Bus configuration */
>
> #define BUS_CONTROL_DRV_BIT_0 0x0000
> #define BUS_CONTROL_DRV_BIT_1 0x0200
>
> #define BUS_CONTROL_EXT_X_MEM_WAIT_STATES 12
>
> #define BUS_CONTROL_EXT_P_MEM_WAIT_STATES 12
>
> #define BUS_CONTROL_REG (
> BUS_CONTROL_DRV_BIT_1 \
> |
> (BUS_CONTROL_EXT_X_MEM_WAIT_STATES << 4) \
> |
> BUS_CONTROL_EXT_P_MEM_WAIT_STATES ) > The above example sets the external X and P memory
> accesses to use 12 wait states. You can set either
> of these values to be 0, 4, 8, or 12 wait states as
> determined by the total delay in your system.
> Simply add up the worst-case access time of the RAM
> chip, plus the delays caused by the LCX16245 chips
> and the address decoder. Just to be on the safe
> side, we also add another 5-10ns to the total. This
> total can then be converted to the number of wait
> states that are required.
>
> I hope this helps to solve your problem.
>
> Regards,
>
> Art Johnson
> Senior Systems Analyst
> PMC Prime Mover Controls Inc.
> 3600 Gilmore Way
> Burnaby, B.C., Canada
> V5G 4R8
> Phone: 604 433-4644
> FAX: 604 433-5570
> Email:
> http://www.pmc-controls.com >
>
> -----Original Message-----
> From: Gonggh [mailto:]
> Sent: Tuesday, October 29, 2002 8:59 AM
> To:
> Subject: ??: [motoroladsp] Any timing problem of
> using LCX16245 to drive
> the Data and address pins of 56805 ?? > Hi
> I have finished my board with two LCX16245
> installed, hoping that I can modify the wait state
> to fit the delay of LCX16245 and some external
> address decoder. And I found I really need to do
> this for my RAM is not as fast as I expect.
> When I disable the external address decoder,
> connect the CS signal of external RAM to GND,
> everything is OK and I can download and debug my
> program well. When I enable the decoder, the
> downloading and debugging are unsteady, always
> crashed! I think the bus delay from LCX16245 and
> address decoder is too long and I need to change the
> wait state of external data and program.
> The question is that how can I modified this
> wait state before I download the program and debug
> it. It is useless to do this in my program and must
> be somewhere in linker.cmd file, am I right? If so
> , how to achieve this?
> Thanks.
> gonggh > -----原始邮件-----
> 发件 Art Johnson [mailto:]
> 发送时 200200:55
> 收件 Gonggh;
> 主题: RE: [motoroladsp] Any timing problem of
> using LCX16245 to drive
> the Data and address pins of 56805 ?? > That's OK, we do the same thing (ie use a different
> number of wait states for different external
> devices). You will, however, need to select some
> extremely fast RAMs (calculations below assume 80MHz
> Zclk):
>
> Write access time from address valid to end of write
> pulse:
> = Tawr + Twr
> = 6.5ns + 7.5ns
> = 14.0ns
> Subtract the worst-case "extra" delays from the
> LCX16245 devices:
> = 14.0ns - ( 2 * 4.5ns )
> = 14.0ns - 9.0ns
> = 5.0ns
> The above assumes no other delays (eg address
> decoding) in the system
>
> Read access time from address valid to end of read
> pulse:
> = Tardd
> = 18.7ns
> Subtract the worst-case "extra" delays from the
> LCX16245 devices:
> = 18.7ns - ( 2 * 4.5ns )
> = 18.7ns - 9.0ns
> = 9.7ns
> The above assumes no other delays (eg address
> decoding) in the system
>
> If you do have other delays such as address decode
> delays, you may find that you have to buy extremely
> fast and expensive RAM devices to achieve
> zero-wait-state operation.
>
> According to the DSP56F807 Data Sheet (DSP56F807/D,
> Rev. 7.0, 1/2002), you will need to use external
> buffers only if your worst-case load capacitance on
> the bus exceeds 50pF (see 3.6 "External Bus
> Asynchronous Timing").
>
> Regards,
>
> Art Johnson
> Senior Systems Analyst


> PMC Prime Mover Controls Inc.
> 3600 Gilmore Way
> Burnaby, B.C., Canada
> V5G 4R8
> Phone: 604 433-4644
> FAX: 604 433-5570
> Email:
> http://www.pmc-controls.com >
>
> -----Original Message-----
> From: Gonggh [mailto:]
> Sent: Monday, October 07, 2002 9:24 AM
> To: Art Johnson;
> Subject: ??: [motoroladsp] Any timing problem of
> using LCX16245 to drive
> the Data and address pins of 56805 ?? >
> But actually, I don't want to slow down all my
> external divices, such as the data ram.
> In my prototype, I have changed the wait states of
> DS to 4 clocks when visiting some slow-speed
> devices, but full speed when using external data
> ram.
>
> -----ԭʼ -----
> : Art Johnson [mailto:]
> ʱ: 2002 10 7 22:22
> ռ : Gonggh;
> : RE: [motoroladsp] Any timing problem of using
> LCX16245 to drive the Data and address pins of 56805
> ?? > This is not a problem, the external memory interface
> can be set up for 0, 4, 8, or 12 wait states. You
> just need to add up all the propagation delays,
> access times, etc. and set the number of wait states
> accordingly. Please see Chapter 6 "External Memory
> Interface" in the DSP56F80x User's Manual.
>
> Regards,
>
> Art Johnson
> Senior Systems Analyst
> PMC Prime Mover Controls Inc.
> 3600 Gilmore Way
> Burnaby, B.C., Canada
> V5G 4R8
> Phone: 604 433-4644
> FAX: 604 433-5570
> Email:
>
=== message truncated ===

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