Re: C5509A core(CPU domain) suspend problem(use HPI multiplexed boot)

Started by Jeff Brower in TMS320c55x10 years ago

DJJ- > I'am debugging a hardware system based on 5509a chip and got a strange > problem,it trouble me many days. > > My system use HPI...

DJJ- > I'am debugging a hardware system based on 5509a chip and got a strange > problem,it trouble me many days. > > My system use HPI multiplexed boot mode(hard set the BOOTM[3..0]),the > system clock use a outside OSC circuit of 20M. > > The host can access the DSP DARAM very stablely(I test it by writting > the test code and then reading it back for comparison many times,and > neve


C5509A core(CPU domain) suspend problem(use HPI multiplexed boot)

Started by djj...@hxpsp.com in TMS320c55x10 years ago

Hi,Anyone can help? I'am debugging a hardware system based on 5509a chip and got a strange problem,it trouble me many days. My system use...

Hi,Anyone can help? I'am debugging a hardware system based on 5509a chip and got a strange problem,it trouble me many days. My system use HPI multiplexed boot mode(hard set the BOOTM[3..0]),the system clock use a outside OSC circuit of 20M. The host can access the DSP DARAM very stablely(I test it by writting the test code and then reading it back for comparison many times,and never found...


JTAG programming of Serial EEPROM for firmware?

Started by Sound Consulting in TMS320c55x10 years ago 4 replies

Hello everyone, I am still working on the schematic and layout for my first C55x board. I have included a Serial EEPROM attached to McBSP0,...

Hello everyone, I am still working on the schematic and layout for my first C55x board. I have included a Serial EEPROM attached to McBSP0, and a JTAG header on the board. I assume that in order to load my first board with firmware, I can use the JTAG port to control the DSP to program the Serial EEPROM over McBSP0. This is a C5506 design. So far, I've selected the ATMEL AT4...


Is it possible for a 5510A to rewrite its own flash?

Started by chri...@hyperspace.org.uk in TMS320c55x10 years ago 3 replies

I'm using a 5510A in a custom modem product and I'm booting it from a parallel flash just like a DSK5510. I use flashburn to load my...

I'm using a 5510A in a custom modem product and I'm booting it from a parallel flash just like a DSK5510. I use flashburn to load my application into the product and that uses an app loaded into the 5510 to write to the flash. Is it possible to rewrite part of the flash from my own app? Is there an example for this or must I try to hack something up from the fbtc code? Has anyone done thi...


EMIF TO HPI

Started by gbon...@tiscali.it in TMS320c55x10 years ago 3 replies

In a master /slave application with two 5502-300Mhz, the master (via EMIF) read slave memory (throw its HPI). To speed-up the access, the EMIF is...

In a master /slave application with two 5502-300Mhz, the master (via EMIF) read slave memory (throw its HPI). To speed-up the access, the EMIF is configured in 32bit access to avoid double read. But the throughput is not very high, each read cycle (done by the master from DMA) is 300n. The EMIF configuration is : TA=0, read setup=1, read strobe=3, read hold=1. If I reduce read strobe to 2 it doesn...


Binary boot table for DSK 5509A

Started by WisconsinAndIowaRRCo in TMS320c55x10 years ago 3 replies

Hello: We're running on a Spectrum Digital DSK 5509A with a TI TMS320VC5509A processor. We're using CCS v3/1/0 with v3.2.2 of the C5500 Code...

Hello: We're running on a Spectrum Digital DSK 5509A with a TI TMS320VC5509A processor. We're using CCS v3/1/0 with v3.2.2 of the C5500 Code Generation Tools. We want to use the TI USB Bootloader to download our application code to the device. We have the device successfully configured to come-up in USB Boot-mode (we do see the TI USB Bootloader enumerate as expected after USB plu...


SDRAM - General question

Started by tonyzlr in TMS320c55x10 years ago 8 replies

Hello all, I'm looking to interface SDRAM to the 5502. I've been designing embedded systems for 25 years, but unfortunately (or perhaps,...

Hello all, I'm looking to interface SDRAM to the 5502. I've been designing embedded systems for 25 years, but unfortunately (or perhaps, fortunately :)) have never used any type of DRAM. My question is this: Is it possible to manually "bank" SDRAM devices like you can with SRAMs? The 5502 EMIF spec (spru621f) states that 256-Mbit is the largest device that can be used. Can I use, say, ...


Re: Re: Hardware requirements to download the CCS code onDSP

Started by Jeff Brower in TMS320c55x10 years ago

Sara- > In a project we finished 2 years ago, we slightly modified two of our > C5510 DSK to use only the JTAG part to communicate with the...

Sara- > In a project we finished 2 years ago, we slightly modified two of our > C5510 DSK to use only the JTAG part to communicate with the PC, and our > own DSP HW board. > Everybody was happy with this solution. The industrial partner had > bought a JTAG emulator but at the end he preferred to use a modified DSK > as well. > Unfortunately I cannot give your more details as the modificat


Hardware requirements to download the CCS code on DSP

Started by jyot...@yahoo.in in TMS320c55x10 years ago 9 replies

Hi,i m building a simple board for an audio application using C5509A.There will also be a codec and voltage regulator on the board.I need to know...

Hi,i m building a simple board for an audio application using C5509A.There will also be a codec and voltage regulator on the board.I need to know how to download the CCS code on the processor.What additional hardware is needed on the board to download the CCS program onto the DSP?


Configuring an ISR for GPIO2 or GPIO7 interrupts on DSP side (OMAP5912)

Started by r_hmoreno in TMS320c55x10 years ago 1 reply

Hi, I use Code Composer Studio 2.21, with CSL 3.0 to develop code for OMAP5912 platform. I'm trying to configure (via DSP side) GPIO7 and...

Hi, I use Code Composer Studio 2.21, with CSL 3.0 to develop code for OMAP5912 platform. I'm trying to configure (via DSP side) GPIO7 and GPIO2 as inputs and configure the generation of an interrupt as these lines are set to '1' (rising edge). The point is that I'm trying to associate an ISR to be called when the interrupt occurs. It has not been easy, once these GPIOs are not prepared...


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