vc33

    used for the 'soft' and 'free' modes.  If they are both set, the
    peripheral does not stop when a breakpoint is encountered.  If
    they are both clear, the peripheral stops.  The 'free' mode is
    nice when you want to use the timer or other peripherals as
    external timing references.  For example a DRAM refresh circuit
    should not be stopped when the emulator halts the processor...

3) Not only do you need to turn on the CPU interrupts in the IE
   register but also the XINT/RINT bits in the SP global control.

Solution:

Dont set the top two bits in the SP or TIM global control and the timer and serial port will come to a screaching halt when a breakpoint is encountered.  Since the AIC is also connected to the timer for its reference it also stops completely.  Be careful, the DAC output goes to the minus rail when it is not continualy updated.

Keith,

You said the JTAG halts the processor when a breakpoint is met. How is it possible to halt also the peripherials so that to avoid exceptions ?  (like FIFO full for ADs).
On the C33 there is no pin such HALT. JTAG pins also do not have HALT pin.

Rds,

Fred >>> Keith Larson < k...@comcast.net > 03/31/05 06:03pm >>>
Hi Leo

If you look at the codec and serial port, clocking is from a free running source that never stops. Therefor when the debugger stops within an ISR, the serial port (especially from the other ISR's point of view) is over/under run. Next, look at the XINT and RINT timing. Since they are clocked from the same MCLK (only one pin), they MUST be at the same rate. Given that the serial ports have 'double buffering' the elegant solution is to use a single ISR. The only catch would be where you might put a breakpoint. If it is after the serial port load/store, you are likely to have an under/overrun.

Another option might be looking for and repairing these conditions in your do nothing 'main loop'?

Yet another, though far far more dangersous is to modify the debug kernel to allow the interrupts when the DSP is communicating with the host. But, as you may imagine there are lots of downsides to this. Basically the stack and or data space can grow out of control. And, in your case, all the processing is done in the ISR's. I like to say this is a NULL program (does nothing usefull). One of the early DSK kernels worked in this manner and it was a super big pain in the butt to explain and support. In the end, simpler was better.

If you happen to be wondering, the JTAG emulator gets around this issue by halting the peripherals when in debug mode (the clocks are halted etc.). Is this how the DSP will operate in the real world? NOT LIKELY! A lot of people make the mistake of assuming their code running with the JTAG emulator is the same as the real world (he-he!). If you can make your code work with the DSK kernel it will be pretty solid, but if it works in BOTH, you are way way ahead.

Best regards
Keith Larson

DSP and Analog Consulting
Lincoln, Ma
http://home.comcast.net/~klarsondsp/ --------------------
newleonardo2004 wrote:

Hi all, I've started working with TI's 320VC33 DSP starter kit. I'm hoping someone here has some experience with this board. To start with I'm trying to write the code to setup the onboard PCM3003 codec and simply loopback the incoming samples to the output. Now i've written some code, and it works ... ish! The problem is that the code i've written seems somehow unreliable. Sometimes if i load the code into the DSK it works first time no problems.

Then other times the code will run for greater than 20 seconds with no interrupts being triggered and then for no apparent reason it will start to work! Other times it just refuses to sample any data in or send any data out until I reload the code into the board or reset it. Once the code is running i can stop it, debug it etc and it will run exactly as intended. Can anyone help me understand why this code doesn't run the same everytime? Maybe its something to do with syncing up the CPLD with the codec and dsp serial port?

Many thanks, Leo

; *******************************************
; * PCM3003 & VC33 DSK Loopback code *
; *******************************************

..include "C3XMMRS.ASM" ; include the addresses for mem mapped registers
..start "codec", 0x809802 ; start assembling here in a safe place
..sect "codec"
..entry START ; on starting program go to this point

ADC .word 0x0
S0_rst .word 0x2BF3000
S0_run .word 0xEBF3000

START ldp ([at]START
ldi ([at]stack,SP ; setup the stack
MAIN call AIC ; this sets up the serial ports.
lpp nop ; pointlessloop as all work is done in the ISR's
br lpp

; ***********************************
; * CODEC Initialisation Routine *
; ***********************************

AIC nop ; this code initialises the codec
ldp T0_ctrl
ldi 0x0,R0
sti R0,([at]T0_ctrl ; halt the timer
sti R0,([at]T0_prd ; zero out the counter
ldi 0x3,R0
sti R0,([at]T0_prd ; load a count into period register to give 12.5MHz
; Now restart the timer.
ldi 0x283,R0
sti R0,([at]T0_ctrl ; this starts the timer running
; Now setup the serial ports.
ldi 0x0,R0
sti R0,([at]S0_gctrl ; halt the serial port
ldi 0x111,R0
sti R0,([at]S0_xctrl
sti R0,([at]S0_rctrl ; setup up tx and rx registers.
ldi 0x0,R0
sti R0,([at]S0_xdata
ldi ([at]S0_run,R0
sti R0,([at]S0_gctrl ; start serial port running.
; store in ADC data and pump it back out.
ldi ([at]S0_rdata,R0
sti R0,([at]S0_xdata ; kick start
; Now enable global interrupts and set interrupt bits.
or 0x2000, ST ; set the global interrupt enable(bit 14 of status register)
or 0x34, IE ; Enable the XINT and RINT interrupts
rets ; return from subroutine.
; ***********************************
; * XINT0 Interrupt Service Routine *
; ***********************************
XINT0 ldi ([at]ADC,R1
lsh -12,R1 ; shift the sampled data to put it in the correct format.
sti R1,([at]S0_xdata ; send the data to the DAC
reti
; ***********************************
; * XINT0 Interrupt Service Routine *
; ***********************************
RINT0 ldi ([at]S0_rdata,R0 ; sample the ADC
sti R0,([at]ADC ; store the sample in RAM
reti
; *****************************
; * STACK *
; *****************************
stack .word $+1 ; the word at stack is the address of the next cell

; Now install the interrupt vector
..start "int_vects", 0x809FC5 ; here's where the XINT0 vector is
..sect "int_vects" ; name the section something
br XINT0 ; branch to the xmit interrupt handler
br RINT0 ; branch to the receive interrupt handler

..end ; stop assembling here!!!

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