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McBSP 5402 DSK

Started by gabrieldsp August 1, 2002
I am use the DSK 5402, and i have some problems with McBSP1, i cant drive =
out the CLKX1.

my program:
#include <stdio.h>

extern void Config5402();
extern void ConfigMcBSP();

int data;
ioport int port0004;

void main(void)
{
Config5402(); /*Configura o DSP TMS320VC5402 */
port0004 = 0x0003; /*Configura a CPLD para usar o Barramento externo */
ConfigMcBSP(); /*Configura o McBSP1 para Master */

while(1){
*(volatile int*) 0x43 = 0xAAAA; /* McBSP1 data transmit register 1 *=
/
}
}

/*--- McBSP0 & McBSP1 Sub-Bank Addressed Registers ---*/
#define SPCR1 0x0000; /* Ser Port Ctrl Reg1 */
#define SPCR2 0x0001; /* Ser Port Ctrl Reg2 */
#define RCR1 0x0002; /* Rx Ctrl Reg1 */
#define RCR2 0x0003; /* Rx Ctrl Reg2 */
#define XCR1 0x0004; /* Tx Ctrl Reg1 */
#define XCR2 0x0005; /* Tx Ctrl Reg2 */
#define SRGR1 0x0006; /* Sample Rate Gen Reg1 */
#define SRGR2 0x0007; /* Sample Rate Gen Reg2 */
#define MCR1 0x0008; /* Multichan Reg1 */
#define MCR2 0x0009; /* Multichan Reg2 */
#define RCERA 0x000A; /* Rx Chan Enable Reg Partition A */
#define RCERB 0x000B; /* Rx Chan Enable Reg Partition B */
#define XCERA 0x000C; /* Tx Chan Enable Reg Partition A */
#define XCERB 0x000D; /* Tx Chan Enable Reg Partition B */
#define PCR 0x000E; /* Pin Ctrl Reg */

/* >>>>>> CONFIGURAO DO McBSP1 <<<<<<<<<<
* Configurao para o McBSP1 funcionar como Master,
n tendo necessidade de clock externo, para sincronismo entre DSP e AIC,
os sinais de Frame Clock e Clock de sincronismo s gerados pelo DSP.*/

void ConfigMcBSP(void)
{
/*--- McBSP1 Registers ---*/
volatile int *McBSP1_SPSA = (volatile int *)0x0048; //Sub Bank Addr Reg
volatile int *McBSP1_SPSD = (volatile int *)0x0049; //Sub Bank Addr Reg

*McBSP1_SPSA = SPCR2;
*McBSP1_SPSD = 0x0200; // MSB> 0000 0010 0000 0000 <LSB
asm(" nop");
asm(" nop");
asm(" nop");
asm(" nop");
asm(" nop");
*McBSP1_SPSA = PCR;
*McBSP1_SPSD = 0x2A0A; // MSB> 0010 1010 0000 1010 <LSB
asm(" nop");
asm(" nop");
asm(" nop");
asm(" nop");
asm(" nop");
*McBSP1_SPSA = RCR2;
*McBSP1_SPSD = 0x0045; // MSB> 0000 0000 0100 0101 <LSB
asm(" nop");
asm(" nop");
asm(" nop");
asm(" nop");
asm(" nop");
*McBSP1_SPSA = XCR2;
*McBSP1_SPSD = 0x0045; // MSB> 0000 0000 0100 0101 <LSB
asm(" nop");
asm(" nop");
asm(" nop");
asm(" nop");
asm(" nop");
*McBSP1_SPSA = SRGR1;
*McBSP1_SPSD = 0x0F0F; // MSB> 0000 1111 0000 0001 <LSB
asm(" nop");
asm(" nop");
asm(" nop");
asm(" nop");
asm(" nop");
*McBSP1_SPSA = SRGR2; /* estes dados s importantes */
*McBSP1_SPSD = 0xE0FF; // MSB> 1111 0000 0000 0001 <LSB
asm(" nop");
asm(" nop");
asm(" nop");
asm(" nop");
asm(" nop");
*McBSP1_SPSA = SPCR2;
*McBSP1_SPSD = 0x0220; // MSB> 0000 0010 0000 0000 <LSB
asm(" nop");
asm(" nop");
asm(" nop");
asm(" nop");
asm(" nop");
*McBSP1_SPSA = SPCR2;
*McBSP1_SPSD = 0x02E1; // MSB> 0000 0010 1110 0001 <LSB
asm(" nop");
asm(" nop");
asm(" nop");
asm(" nop");
asm(" nop");
}