Working on bringing up a TMS320DM6446 custom board.
SDRAM is MT47H64M16HR-3 which are the new versions of the
MT47H64M16BT-37E chips on the TI DaVinci Eval boards.
When we perform writes, the value gets written into a 16 byte range
but the bytes appear transposed within the 16 byte range.
A write of 0xFFFFFFFF might be displayed as
0x00FF00FF 0x00000000 0xFF00FF00
Have tried several DDR SDRAM parameters, e.g. SDTIMR, SDTIMR0(including
values that TI support has sent us).
Thanks,
Jerry
SDRAM corruption
Started by ●September 24, 2008
Reply by ●September 24, 20082008-09-24
Jerry,
On Tue, Sep 23, 2008 at 5:22 PM, wrote:
> Working on bringing up a TMS320DM6446 custom board.
> SDRAM is MT47H64M16HR-3 which are the new versions of the
> MT47H64M16BT-37E chips on the TI DaVinci Eval boards.
>
> When we perform writes, the value gets written into a 16 byte range
> but the bytes appear transposed within the 16 byte range.
> A write of 0xFFFFFFFF might be displayed as
>
> 0x00FF00FF 0x00000000 0xFF00FF00
>
> Have tried several DDR SDRAM parameters, e.g. SDTIMR, SDTIMR0(including
> values that TI support has sent us).
I do not think that any transposed bytes will be resolved by settings.
My preference in troubleshooting problems like this is to characterize
the problem as clearly as possible. The example that you gave doesn't
give much to go on. My suggestion would be to write a small simple
program that executes in internal memory and writes a pattern to a
small block of internal memory [so that you can have a reference for
what your program wrote] and a small block of SDRAM. Your pattern
should be constructed so that each 8 bits are unique.
1. Fill the memory range with 0s
2. Perform 8 bit writes to 256 locations [0-0xFF incrementing is
easy]. Check results.
3. Fill with 0s.
4. Perform 16 bit writes to 128 locations. Check results.
5. Fill with 0s.
6. Perform 32 bit writes to 64 locations. Check results.
7. Fill with 0s.
8. Perform 64 bit writes to 32 locations. Check results.
9. Analyze the results to see if there is a pattern. The problem is
likely due to EMIF to SDRAM connections.
mikedunn
>
> Thanks,
> Jerry
--
www.dsprelated.com/blogs-1/nf/Mike_Dunn.php
On Tue, Sep 23, 2008 at 5:22 PM, wrote:
> Working on bringing up a TMS320DM6446 custom board.
> SDRAM is MT47H64M16HR-3 which are the new versions of the
> MT47H64M16BT-37E chips on the TI DaVinci Eval boards.
>
> When we perform writes, the value gets written into a 16 byte range
> but the bytes appear transposed within the 16 byte range.
> A write of 0xFFFFFFFF might be displayed as
>
> 0x00FF00FF 0x00000000 0xFF00FF00
>
> Have tried several DDR SDRAM parameters, e.g. SDTIMR, SDTIMR0(including
> values that TI support has sent us).
I do not think that any transposed bytes will be resolved by settings.
My preference in troubleshooting problems like this is to characterize
the problem as clearly as possible. The example that you gave doesn't
give much to go on. My suggestion would be to write a small simple
program that executes in internal memory and writes a pattern to a
small block of internal memory [so that you can have a reference for
what your program wrote] and a small block of SDRAM. Your pattern
should be constructed so that each 8 bits are unique.
1. Fill the memory range with 0s
2. Perform 8 bit writes to 256 locations [0-0xFF incrementing is
easy]. Check results.
3. Fill with 0s.
4. Perform 16 bit writes to 128 locations. Check results.
5. Fill with 0s.
6. Perform 32 bit writes to 64 locations. Check results.
7. Fill with 0s.
8. Perform 64 bit writes to 32 locations. Check results.
9. Analyze the results to see if there is a pattern. The problem is
likely due to EMIF to SDRAM connections.
mikedunn
>
> Thanks,
> Jerry
--
www.dsprelated.com/blogs-1/nf/Mike_Dunn.php
Reply by ●September 24, 20082008-09-24
Jerry-
> Working on bringing up a TMS320DM6446 custom board.
> SDRAM is MT47H64M16HR-3 which are the new versions of the
> MT47H64M16BT-37E chips on the TI DaVinci Eval boards.
>
> When we perform writes, the value gets written into a 16 byte range
> but the bytes appear transposed within the 16 byte range.
> A write of 0xFFFFFFFF might be displayed as
>
> 0x00FF00FF 0x00000000 0xFF00FF00
>
> Have tried several DDR SDRAM parameters, e.g. SDTIMR, SDTIMR0(including
> values that TI support has sent us).
Just a guess, but did you carefully check the byte select signals on your custom
board? I've seen cases before where people did something like a hierarchy block in
the schematic and reversed the numbering, e.g. [0..3] in one place, [3..0] in
another, and DRC didn't show it as an error. Sorta "feels" to me like you might got
something like that. Suggest to take a blank PCB and ohm-out from DSP pins to SDRAM
pins, one-by-one.
-Jeff
> Working on bringing up a TMS320DM6446 custom board.
> SDRAM is MT47H64M16HR-3 which are the new versions of the
> MT47H64M16BT-37E chips on the TI DaVinci Eval boards.
>
> When we perform writes, the value gets written into a 16 byte range
> but the bytes appear transposed within the 16 byte range.
> A write of 0xFFFFFFFF might be displayed as
>
> 0x00FF00FF 0x00000000 0xFF00FF00
>
> Have tried several DDR SDRAM parameters, e.g. SDTIMR, SDTIMR0(including
> values that TI support has sent us).
Just a guess, but did you carefully check the byte select signals on your custom
board? I've seen cases before where people did something like a hierarchy block in
the schematic and reversed the numbering, e.g. [0..3] in one place, [3..0] in
another, and DRC didn't show it as an error. Sorta "feels" to me like you might got
something like that. Suggest to take a blank PCB and ohm-out from DSP pins to SDRAM
pins, one-by-one.
-Jeff
