Re: =?windows-1252?Q?Can=92t_get_right_data_when_using_6713_interface_wit?= =?windows-1252?Q?h_a_DAC_converter=21?=

Jeff:
Thanks very much for your reply!
The first question: “If the ADCs and DACs are connected to EMIF, then why do you need additional GPIO signals? To what pins are the GPIO signals connected?”
The ADC we used is MAXIM1317. Its reference pdf is:
http://datasheets.maxim-ic.com/en/ds/MAX1316-MAX1326.pdf
The DAC we used is AD5344. Its reference pdf is:
http://www.analog.com/static/imported-files/data_sheets/AD5334_5335_5336_5344.pdf
From that we know that the ADC needs control signals such as /CS /Convst /RD /EOLC, so we configure Mcbsp as GPIO to send these signals. For example, FSX0 and CLKX0 are configured as /RD and /CS of ADC respectively, FSR0 and CLKR1 are configured as DAC’s /WR and /LDAC respectively. According to ADC timing, DSP can be programmed to send these control signals one by one. Then ADC can work. We searched TMS320C6000 DSP EMIF Reference Guide and found that EMIF couldn’t send these control signals. We only used EMIF’s data line ED[0:13]. Above this is the initial thinking, is it right? But now when we use EMIF, I find /CEn should be connected to ADC/DAC’s /CS to select DSP memory space. I can’t connect CLKX0 pin and /CEn pin both to the same /CS of ADC. That’s my puzzle.
The second question: “Well, you have to both read and write the ADCs/DACs, correct? Normally either /AWE or /ARE is connected (usually just one is needed).”
Yes, ADC and DAC are all both read/ written. Why only connect /AWE or /ARE? According to my understanding, /AWE is active-low write strobe for asynchronous memory interface, /ARE is Active-low read strobe for asynchronous memory interface. I think we should use /ARE after ADC has finished sampling and use /AWE after DSP has got a result, so we should make use of both. Is it correct? If only connect /ARE, how to write to DAC?
“How do you plan to control the WR and RD signals on the ADC and DAC chips? Using the GPIO pins? That could work, but it's going to make your code very slow.”
Yes, using GPIO to control them. How to avoid making code slowly?
The last question: “Are you saying you left the /AWE and /ARE pins NC?”
Yes, on designed ADC/DAC board /AWE and /ARE pins are both NC. If connect /AWE to /WR of DAC, the original FSR0 (GPIO pin) should be disconnected? /CEn pin of EMIF should be connected also? When DSP is powered, /CE0 /CE1 /CE2 /CE3 pins in EMIF are all about 3.3V high level. Is it right? In fact, I tried to connect /AWE to /WR of DAC without disconnecting FSR0 yesterday, the low level of /WR was 2.81V and the result was wrong.

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