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Hello Dear, We use C6416 DSP processor(DSK C6416 @720MHz) and Dughter card include FPGA chip (Virtex-E). we want to read data from FPGA around 60 MBytes/Sec trough EMIF port of DSP Processor. but we can't do it. we examine asynchroun and synchron method for reading of data from EMIF but we only read data with 8 M sample per sec. do you help us about that? we think we should set the operation of L2 memory and cache operation. but we don't know how do it. Best thanks H.Mahdavi |
EMIF SPEED
Started by ●February 16, 2005
Reply by ●February 16, 20052005-02-16
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Mahdavi- > We use C6416 DSP processor(DSK C6416 @720MHz) and Dughter card > include FPGA chip (Virtex-E). > we want to read data from FPGA around 60 MBytes/Sec trough EMIF > port of DSP Processor. but we can't do it. > we examine asynchroun and synchron method for reading of data > from EMIF but we only read data with 8 M sample per sec. > do you help us about that? > we think we should set the operation of L2 memory and cache operation. > but we don't know how do it. First you said byte/sec, then you said "sample". What is a sample? A byte? Or are you saying that you measure 8M x 32 bits per sec, or 32 Mbyte/sec? You won't need to play with L2/cache configuration to measure max performance. Try DMA to/from onchip memory. -Jeff |
Reply by ●February 27, 20052005-02-27
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Mahdavi > I mean that i can read from FPGA(sing EMIF) with maximum 8 MHz, > and i read one byte per read. Is this with C code? Asm code? You have to explain in detail what you're doing. > is it possible that i increase > frequency of read from EMIF? Yes. 8 MHz is slow, even for asynchronous EMIF. > Later i want to use all of 32 bits of emif port and i should > read bytes with 25 Mhz from EMIF. You should be able to achieve with no problem. Have you tried DMA access yet? -Jeff |
