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Re:DSP Boot./halt...

Started by gangadhar reddy March 3, 2005

Hi all,
First let me thank all for there answers.
At last i solved my Boot Problem.The problem was with the loading address that means the address specified were different at the Host side(through pci) and at the target side(linker file).
Now we want to HALT the DSP (TMS320c6415) through PCI.
For Halting the DSP We came across wt two solutions
one through IDLE instruction and other through Power down logic(using CSR Register).
But the problem here is we are not able to access the csr register through PCI(it is accessable only through MVC instruction).Is there any mechanism through which we can access the csr register through PCI(here our limitation is CSR cannot be accessed through address like memory mapped register).
what we planned here is we want to generate one of the software interrupt or external interrupt(otherthan Reset) through pci by accessing corresponding register address,and we will put the power down logic at the corresponding ISR.But here the limitation is we need to access the IER or CSR register Address to enable GIE and NMIE bits so that interrupt takes place and corresponding powerdown logic executes and halts the DSP.if at all the processor Halts then we need to put the processor in BOOt mode (it should goes to 00000 the address).
So can anybody plz help us to solve our problem..
regards
Gangadhar



Hi Gangadhar,
 
It sounds like the 'real question' is "How can I perform basic debug on a c6x without CCS?".
 
I am not sure of your end objective, but I will offer some general comments. 
 
This is not as simple as it sounds.  Most people that I have known who went down this journey, wished that they had not approached it this way.  My suggestion is to use CCS to develop low level robust 'monitor functions' [halt, run, r/w regs] - possibly hooking into DSP/BIOS.  You will need 'well behaved routines' on your target to just to halt, examine the PC, and run the DSP, etc.  If you go ahead and design for this now, it will be a shorter journey.  If you are trying to get there without using CCS, it will be difficult.
 
One method to use is a high priority interrupt to halt the DSP if it is running and you want to halt on demand.  if you do this, you have a chance [possibly slim] of retrieving some stack info.
 
You can also load some code at add 0 that points to a custom routine and issue a DSPINT.  This will give you some control over the DSP.
 
If you know where you want to 'put an idle instruction', why not use a branch to a custom routine that gets whatever info that you want.  I would discourage the use of some power down mode [although i am not familiar with the details] as it may have some unexpected side effects.
 
mikedunn

gangadhar reddy <g...@yahoo.co.in> wrote:


Hi all,
First let me thank all for there answers.
At last i solved my Boot Problem.The problem was with the loading address that means the address specified were different at the Host side(through pci) and at the target side(linker file).
Now we want to HALT the DSP (TMS320c6415) through PCI.
For Halting the DSP We came across wt two solutions
one through IDLE instruction and other through Power down logic(using CSR Register).
But the problem here is we are not able to access the csr register through PCI(it is accessable only through MVC instruction).Is there any mechanism through which we can access the csr register through PCI(here our limitation is CSR cannot be accessed through address like memory mapped register).
what we planned here is we want to generate one of the software interrupt or external interrupt(otherthan Reset) through pci by accessing corresponding register address,and we will put the power down logic at the corresponding ISR.But here the limitation is we need to access the IER or CSR register Address to enable GIE and NMIE bits so that interrupt takes place and corresponding powerdown logic executes and halts the DSP.if at all the processor Halts then we need to put the processor in BOOt mode (it should goes to 00000 the address).
So can anybody plz help us to solve our problem..
regards
Gangadhar

<*> To visit your group on the web, go to:
http://groups.yahoo.com/group/c6x/

<*> To unsubscribe from this group, send an email to:
c...@yahoogroups.com

<*



Gangadhar,
 
You need to read TI's docs carefully.  DSPINT can be programmed to behave like a "regular interrupt" if it is enabled.  I also remember something about the DSP having to write a 1 to clear something to do with DSPINT.
 
I do not recall the details, but I believe that they are spelled out in spru578.
 
Let us know your results.
 
mikedunn

gangadhar reddy <g...@yahoo.co.in> wrote:
Hi Mike,
with my own Boot  function   There is Application running in the DSP board  continuously (dspint is set in my boot application through pci),only onetime after reset DSPINT will work to wake up the processor .plz tell me how can i issue other interrupt through pci to halt so that i will put halt vector in the corresponding ISR.these are all the things we need to do through PCI.plz sugg est me keeping in mind that i need to do all the stuff through PCI .
 
 
 
Mike Dunn <m...@sbcglobal.net> wrote:
Hi Gangadhar,
 
It sounds like the 'real question' is "How can I perform basic debug on a c6x without CCS?".
 
I am not sure of your end objective, but I will offer some general comments. 
 
This is not as simple as it sounds.  Most people that I have known who went down this journey, wished that they had not approached it this way.  My suggestion is to use CCS to develop low level robust 'monitor functions' [halt, run, r/w regs] - possibly hooking into DSP/BIOS.  You will need 'well behaved routines' on your target to just to halt, examine the PC, and run the DSP, etc.  If you go ahead and design for this now, it will be a shorter journey.  If you are trying to get there without using CCS, it will be difficult.
 
One method to use is a high priority interrupt to halt the DSP if it is running and you want to halt on demand.  if you do this, you have a chance [possibly slim] of retrieving some stack info.
 
You can also load some code at add 0 that points to a custom routine and issue a DSPINT.  This will give you some control over the DSP.
 
If you know where you want to 'put an idle instruction', why not use a branch to a custom routine that gets whatever info that you want.  I would discourage the use of some power down mode [although i am not familiar with the details] as it may have some unexpected side effects.
 
mikedunn

gangadhar reddy <g...@yahoo.co.in> wrote:


Hi all,
First let me thank all for there answers.
At last i solved my Boot Problem.The problem was with the loading address that means the address specified were different at the Host side(through pci) and at the target side(linker file).
Now we want to HALT the DSP (TMS320c6415) through PCI.
For Halting the DSP We came across wt two solutions
one through IDLE instruction and other through Power down logic(using CSR Register).
But the problem here is we are not able to access the csr register through PCI(it is accessable only through MVC instruction).Is there any mechanism through which we can access the csr register through PCI(here our limitation is CSR cannot be accessed through address like memory mapped register).
what we planned here is we want to generate one of the software interrupt or external interrupt(otherthan Reset) through pci by accessing corresponding register address,and we will put the power down logic at the corresponding ISR.But here the limitation is we need to access the IER or CSR register Address to enable GIE and NMIE bits so that interrupt takes place and corresponding powerdown logic executes and halts the DSP.if at all the processor Halts then we need to put the processor in BOOt mode (it should goes to 00000 the address).
So can anybody plz help us to solve our problem..
regards
Gangadhar

<*> To visit your group on the web, go to:
http://groups.yahoo.com/group/c6x/

<*> To unsubscribe from this group, send an email to:
c...@yahoogroups.com

<*



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