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I was wondering if anyone could help me with a small, but very urgent,
problem. I am trying to get the external interrupts going by inputting to the pins DB_EINT4 to 7 on the Extended Perpheral Interface (which claim to be outputs in the pin assignments, they could be right?!?) with simple Normally Open push buttons. I am using CCS1.05 and I have assigned an ISR from the HWI module. I am also enabling these specific interrupts with IER (not GIE). I can see that the IFR is flagging my interrupt bits, but it is not servicing them. Is there more I need to do? Also, the RESET IER bit is always LOW (IER bit 0) and the NMI bit is HIGH (IER bit 1), when in the notes it says it should be the other way around (RESET HIGH, NMI LOW in IER). What do I need to do? Am I wrong, the notes wrong or the board faulty? I desperately need help. Thanks, Sid. |
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interrupts on c6211 DSK
Started by ●November 2, 2001
Reply by ●November 2, 20012001-11-02
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Hi Sid, Do I understand it correctly. That you enabled the external interrupts but not the GIE? You need to enable the Global interrupt enable otherwise you won't get any interrupts. You also say that you see a change in the IFR register. This is good, it means that you actually see the interrupt on your DB_EINT pin. Which means there is no hardware problem. I expect that enabling the global interrupt will do the trick. It is used to enable/disable all interrupts at once. Each interrupt independtly must be enabled in the IER register. Hope this helps, Cheers, Paul Kamphuis sr. software architect Relitech BV On 2 Nov 2001, at 23:07, Sidney Jung wrote: > I was wondering if anyone could help me with a small, but very urgent, > problem. > > I am trying to get the external interrupts going by inputting to the > pins DB_EINT4 to 7 on the > Extended Perpheral Interface (which claim to be outputs in the pin > assignments, they could be right?!?) with simple Normally Open push > buttons. I am using CCS1.05 and I have assigned an ISR from the HWI > module. I am also enabling these specific interrupts with IER (not > GIE). I can see that the IFR is flagging my interrupt bits, but it is > not servicing them. Is there more I need to do? Also, the RESET IER > bit is always LOW (IER bit 0) and the NMI bit is HIGH (IER bit 1), > when in the notes it says it should be the other way around (RESET > HIGH, NMI LOW in IER). What do I need to do? Am I wrong, the notes > wrong or the board faulty? I desperately need help. > > Thanks, > Sid. > > > _____________________________________ > Note: If you do a simple "reply" with your email client, only the > author of this message will receive your answer. You need to do a > "reply all" if you want your answer to be distributed to the entire > group. > > _____________________________________ > About this discussion group: > > To Join: Send an email to > > To Post: Send an email to > > To Leave: Send an email to > > Archives: http://www.yahoogroups.com/group/c6x > > Other Groups: http://www.dsprelated.com > ">http://docs.yahoo.com/info/terms/ |
Reply by ●November 2, 20012001-11-02
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I don't recall specifically about the non-maskable interrupt but
the settings you say you have them set to sound correct. Have you set the Enable Global Interrupts bit to 1? I believe this is in the GIE register. -Devin -----Original Message----- From: Sidney Jung [mailto:] Sent: Friday, November 02, 2001 4:08 AM To: Subject: [c6x] interrupts on c6211 DSK I was wondering if anyone could help me with a small, but very urgent, problem. I am trying to get the external interrupts going by inputting to the pins DB_EINT4 to 7 on the Extended Perpheral Interface (which claim to be outputs in the pin assignments, they could be right?!?) with simple Normally Open push buttons. I am using CCS1.05 and I have assigned an ISR from the HWI module. I am also enabling these specific interrupts with IER (not GIE). I can see that the IFR is flagging my interrupt bits, but it is not servicing them. Is there more I need to do? Also, the RESET IER bit is always LOW (IER bit 0) and the NMI bit is HIGH (IER bit 1), when in the notes it says it should be the other way around (RESET HIGH, NMI LOW in IER). What do I need to do? Am I wrong, the notes wrong or the board faulty? I desperately need help. Thanks, Sid. _____________________________________ Note: If you do a simple "reply" with your email client, only the author of this message will receive your answer. You need to do a "reply all" if you want your answer to be distributed to the entire group. _____________________________________ About this discussion group: To Join: Send an email to To Post: Send an email to To Leave: Send an email to Archives: http://www.yahoogroups.com/group/c6x Other Groups: http://www.dsprelated.com ">http://docs.yahoo.com/info/terms/ |
Reply by ●November 2, 20012001-11-02
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I am looking at building a board using the C6711 and have not decided whether to use standard async flash memory or sync flash. The only examples I see show async flash. It also appears that the process of booting from flash may require that the memory be mapped to a range of addresses that can only be used as async memory. Am I reading the correctly? Is it possible to boot the C6711 from sync flash without using any extra hardware? Rick Collins Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design http://www.arius.com 4 King Ave 301-682-7772 Voice Frederick, MD 21701-3110 301-682-7666 FAX |
