Dear All,
I am trying to transfer bits (no frame buffer) straight from an 8pin digital
output of a CMOS camera to the external SDRAM of on the 6713DSK. I understand
that I have to go via the EMIF of the DSK, but can someone explain to me how i
can do the transfers from the camera to the SDRAM using EDMA controls...
I am currently sending 8 bit YUV out of the camera (res 160x120)
any help is much appreciated.
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>Henrry Andrian wrote :
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>> Hi.. You mean that using the asynchronous 8-bit mode, EMIF could
>> read data for at least 8-9 MHz? Currently my EDMA setting is 3-1-2
>> (for Reading). Could I know the setting for the EDMA Transfer.
>>
>> Currenlty my EDMA setting can be seen as below:
>> 1. FS = 0 (element synch)
>> 2. ESIZE = 8 Bit
>> 3. Data Source = Not Increament and 1D
>> 4. Data Destination = Increament and 1D
>> 5. Transfer count
>> Frame Count: 0x1fd
>> Element Count = 0x280
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>Obviously a 3-1-2 setting on a 100 MHz bus
>requires 60 ns.
>In some design, we are using asynchronous
>access between 60-100ns for example to
>access registers in FPGA or EPLD.
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>So yes, you could expect a full bandwidth of 10-16 MHz.
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>But some other points have to be taken into account.
>1/ You have to write the data somewhere
>2/ You have to read the data for processing
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>The EDMA reads data at that speed, but also need to
>write the data somewhere => if you are writting to
>external SDRAM you will take time too.
>Counting on EDMA internal fifo + SDRAM acces, I imagine that
>you should add around 2 T per access.
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>On a old 6201 system we have interfaced an asynchronous fifo
>at 16 MHz on 32 bits allowing 64 MB/s data rate. But as we needed
>to store data in SDRAM and to read it back for processing,
>the total bandwidth that our system could acquire and process
>was around 45-50 MB/s.
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>I was wondering how your sensor is connected to EMIF
>because it seems that you are trying to read the video
>using a single EDMA run. Do you have a frame memory
>or are you sure that your EDMA doesn't read too fast
>or too slow ?
>May be you are using ARDY ?
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>The most used capture system is :
>sensor => fifo (sync preferable) => EMIF
>\--- HSYNC -------------------> EXTINTn
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>then configure EDMA as 2D, use Frame Synchronisation
>and use something like HSYNC to trigger line per line
>EDMA frame transfer.
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>This is what we are using or our C64x based boards
>and similar to what is implemented in DM642 video port.
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>Jean-Michel MERCIER
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>--
>dsp & imaging - www.ateme.com
>ATEME - 26 Burospace - 91573 BIEVRES
>Tel : +33 (0)1 69 35 89 73 (direct)
>Fax : +33 (0)1 60 19 13 95
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>>
>> Thx.
>>
>> --- In , "Jean-Michel MERCIER"
>> wrote:
>> > > rate is already enough for my application, but I still would
>> like to
>> > > know whether the maximum speed of EDMA-EMIF is 4.12 Mhz when
>> reading
>> >
>> > I think you should be able to go at least twice that.
>> > Using 100 MHz EMIF, you should be able to get below 10 cycles
>> > for an asynchronos read.
>> >
>> > > If I want to change my frame rate 12 fps to 30 fps, What should
>> I
>> > > do? Is there any experience using EDMA-EMIF that read for 30 fps.
>> >
>> > Go synchronous using sync-FIFO or FPGA.
>> >
>> > Simple image capture : use BT.656 or similar sensor, connect to
>> FPGA,
>> > connect Fpga to EMIF.
>> > Et voil?!
>> > Should work (with a little piece of work in the Fpga of course).
>> >
>> > Jean-Michel MERCIER
>> >
>> > --
>> > dsp & imaging - www.ateme.com
>> > ATEME - 26 Burospace - 91573 BIEVRES
>> > Tel : +33 (0)1 69 35 89 73 (direct)
>> > Fax : +33 (0)1 60 19 13 95
>>
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