Upsample, Downsample in the DSP audio Processing

The audio system sample rate is 192 kbits/s. The DSP audio processing
involves the ASIC hardware and DSP processor. Due to the real-time
constrains, the equalizer need be implemented at 16 kbits/s by a DSP
processor. The routine way is to first down sample the audio signal to 16
kbits/s, design an equalizer, then apply the equalizer to the audio signal
at 16 kbits. Then the equalized audio signal is up sampled to 192 kbits/s.
However, since our system has a ASIC hardware to support the equalizer
operation at 192 kbits/s, it is more efficient to upsample the equalizer
coefficients from 16 kbits/s to 192 kbits/s. Is there better way to
upsample the equalizer coefficients from 16 kbits/s to 192 kbits/s except
to repeat the equalizer coefficient 12 times?

 Thanks for your attention and suggestion in advance.



---------------------------------------
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Kathy_pdx <59507@DSPRelated> wrote:

>The audio system sample rate is 192 kbits/s. The DSP audio processing
>involves the ASIC hardware and DSP processor. Due to the real-time
>constrains, the equalizer need be implemented at 16 kbits/s by a DSP
>processor. The routine way is to first down sample the audio signal to 16
>kbits/s, design an equalizer, then apply the equalizer to the audio signal
>at 16 kbits. Then the equalized audio signal is up sampled to 192 kbits/s.
>However, since our system has a ASIC hardware to support the equalizer
>operation at 192 kbits/s, it is more efficient to upsample the equalizer
>coefficients from 16 kbits/s to 192 kbits/s. Is there better way to
>upsample the equalizer coefficients from 16 kbits/s to 192 kbits/s except
>to repeat the equalizer coefficient 12 times?

>Thanks for your attention and suggestion in advance.

There should be better ways than replication.

How fast must you compute the desired coefficients from the
original 16 ks/sec coefficients?  i.e. can you take 300 msec
to do this, and do you have processor cycles available?

Steve

>Kathy_pdx <59507@DSPRelated> wrote:
>
>>The audio system sample rate is 192 kbits/s. The DSP audio processing
>>involves the ASIC hardware and DSP processor. Due to the real-time
>>constrains, the equalizer need be implemented at 16 kbits/s by a DSP
>>processor. The routine way is to first down sample the audio signal to
16
>>kbits/s, design an equalizer, then apply the equalizer to the audio
signal
>>at 16 kbits. Then the equalized audio signal is up sampled to 192
kbits/s.
>>However, since our system has a ASIC hardware to support the equalizer
>>operation at 192 kbits/s, it is more efficient to upsample the
equalizer
>>coefficients from 16 kbits/s to 192 kbits/s. Is there better way to
>>upsample the equalizer coefficients from 16 kbits/s to 192 kbits/s
except
>>to repeat the equalizer coefficient 12 times?
>
>>Thanks for your attention and suggestion in advance.
>
>There should be better ways than replication.
>
>How fast must you compute the desired coefficients from the
>original 16 ks/sec coefficients?  i.e. can you take 300 msec
>to do this, and do you have processor cycles available?
>
>Steve

Hi, Steve

  There are some cycles available for the upsample processing, but I need
look at the profile to get the exact cycles. What is in your mind to
improve the upsample processing?


Kathy

---------------------------------------
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Kathy_pdx <59507@DSPRelated> wrote:

>Hi, Steve

>There are some cycles available for the upsample processing, but I need
>look at the profile to get the exact cycles. What is in your mind to
>improve the upsample processing?

I don't have an exact idea, but my thought was to replicate
the EQ transfer function, but extend the response for the
highest EQ band (which starts somewhere below 8 KHz) to be
up to at least 20 KHz (rather than having the response mirror around 
8 KHz, an outcome which would be somewhere between undesirable and 
disastrous).

There is quite a bit of material out there on synthesizing
filter coefficients from EQ settings, so worst case you could
transform the original coefficients to get the spectral
shape, extend this shape as described above, then re-synthesize
the coefficients for the higher sample rate.

But I bet there's a short-cut method.

Steve

Hi, Steve

  Thanks for your suggestion. I have a preliminary idea how to implement
the upsample of the EQ coefficients. 

The 16 kbis/s EQ coefficients should be first converted to the continuous
time filter by using the inverse bi-linear transform with the sample rate
at 16 kbits/s. After that, the continuous time filter coefficients will be
converted back to the discrete time EQ coefficient with the bi-linear
transform with the sample rate at 192 kbits/s. 

Kathy 
---------------------------------------
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On Mon, 15 Jun 2015 13:51:08 -0500, Kathy_pdx wrote:

> The audio system sample rate is 192 kbits/s. 

I assume you mean ks/s.

> The DSP audio processing
> involves the ASIC hardware and DSP processor. Due to the real-time
> constrains, the equalizer need be implemented at 16 kbits/s by a DSP
> processor. The routine way is to first down sample the audio signal to
> 16 kbits/s, design an equalizer, then apply the equalizer to the audio
> signal at 16 kbits. Then the equalized audio signal is up sampled to 192
> kbits/s.
> However, since our system has a ASIC hardware to support the equalizer
> operation at 192 kbits/s, it is more efficient to upsample the equalizer
> coefficients from 16 kbits/s to 192 kbits/s. Is there better way to
> upsample the equalizer coefficients from 16 kbits/s to 192 kbits/s
> except to repeat the equalizer coefficient 12 times?

The equalizer is a FIR?

There are lots of better ways, of varying degrees of "goodness", but what 
is good depends on what you need.

In the absence of any further information, I suggest that you use splines 
to interpolate the points.  That may be too fancy, in which case using 
linear interpolation almost has to be better than just applying a zero-
order hold.

Best would be to design your equalizer taps for 192ks/s in the first 
place.

PDX = Portland?  I'm east of Oregon City.

-- 
www.wescottdesign.com

Kathy_pdx <59507@DSPRelated> wrote:

>Hi, Steve

>Thanks for your suggestion. I have a preliminary idea how to implement
>the upsample of the EQ coefficients. 

>The 16 kbis/s EQ coefficients should be first converted to the continuous
>time filter by using the inverse bi-linear transform with the sample rate
>at 16 kbits/s. After that, the continuous time filter coefficients will be
>converted back to the discrete time EQ coefficient with the bi-linear
>transform with the sample rate at 192 kbits/s. 

This sounds good, if you have the cycles to do it.

I'd verify that the resulting magnitude response is flat, or flat-ish, 
between your high EQ band (somewhat lower than 8 KHz) and 20 KHz,
and if not, look for some minimal modification to the coefficients
and/or filter that achieves this.  Then you're in business.


Steve

>On Mon, 15 Jun 2015 13:51:08 -0500, Kathy_pdx wrote:
>
>> The audio system sample rate is 192 kbits/s. 
>
>I assume you mean ks/s.
>
>> The DSP audio processing
>> involves the ASIC hardware and DSP processor. Due to the real-time
>> constrains, the equalizer need be implemented at 16 kbits/s by a DSP
>> processor. The routine way is to first down sample the audio signal to
>> 16 kbits/s, design an equalizer, then apply the equalizer to the audio
>> signal at 16 kbits. Then the equalized audio signal is up sampled to
192
>> kbits/s.
>> However, since our system has a ASIC hardware to support the equalizer
>> operation at 192 kbits/s, it is more efficient to upsample the
equalizer
>> coefficients from 16 kbits/s to 192 kbits/s. Is there better way to
>> upsample the equalizer coefficients from 16 kbits/s to 192 kbits/s
>> except to repeat the equalizer coefficient 12 times?
>
>The equalizer is a FIR?
>
>There are lots of better ways, of varying degrees of "goodness", but what

>is good depends on what you need.
>
>In the absence of any further information, I suggest that you use splines

>to interpolate the points.  That may be too fancy, in which case using 
>linear interpolation almost has to be better than just applying a zero-
>order hold.
>
>Best would be to design your equalizer taps for 192ks/s in the first 
>place.
>
>PDX = Portland?  I'm east of Oregon City.
>
>-- 
>www.wescottdesign.com

Yes, You are right, It should be 16 kHz. My bad. I am in Portland.
PDX=Portland. 

It is an IIR filter. Since the EQ coefficients need be upsampled, the
splines linear interpolation is not available since there is no end point.
Due to the DSP processor constraints, the equalizer design has to be
operated at 16 kHz/s.


---------------------------------------
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On Mon, 15 Jun 2015 15:54:46 -0500, Kathy_pdx wrote:

>>On Mon, 15 Jun 2015 13:51:08 -0500, Kathy_pdx wrote:
>>
>>> The audio system sample rate is 192 kbits/s.
>>
>>I assume you mean ks/s.
>>
>>> The DSP audio processing involves the ASIC hardware and DSP processor.
>>> Due to the real-time constrains, the equalizer need be implemented at
>>> 16 kbits/s by a DSP processor. The routine way is to first down sample
>>> the audio signal to 16 kbits/s, design an equalizer, then apply the
>>> equalizer to the audio signal at 16 kbits. Then the equalized audio
>>> signal is up sampled to
> 192
>>> kbits/s.
>>> However, since our system has a ASIC hardware to support the equalizer
>>> operation at 192 kbits/s, it is more efficient to upsample the
> equalizer
>>> coefficients from 16 kbits/s to 192 kbits/s. Is there better way to
>>> upsample the equalizer coefficients from 16 kbits/s to 192 kbits/s
>>> except to repeat the equalizer coefficient 12 times?
>>
>>The equalizer is a FIR?
>>
>>There are lots of better ways, of varying degrees of "goodness", but
>>what
> 
>>is good depends on what you need.
>>
>>In the absence of any further information, I suggest that you use
>>splines
> 
>>to interpolate the points.  That may be too fancy, in which case using
>>linear interpolation almost has to be better than just applying a zero-
>>order hold.
>>
>>Best would be to design your equalizer taps for 192ks/s in the first
>>place.
>>
>>PDX = Portland?  I'm east of Oregon City.
>>
>>--
>>www.wescottdesign.com
> 
> Yes, You are right, It should be 16 kHz. My bad. I am in Portland.
> PDX=Portland.
> 
> It is an IIR filter. Since the EQ coefficients need be upsampled, the
> splines linear interpolation is not available since there is no end
> point.
> Due to the DSP processor constraints, the equalizer design has to be
> operated at 16 kHz/s.

Wait, wait.  In your original post you said that the ASIC was equipped to 
do equalization, now you're saying that no, the equalization must happen 
in the DSP.

What?

-- 
www.wescottdesign.com

Tim Wescott  <tim@seemywebsite.com> wrote:

>On Mon, 15 Jun 2015 15:54:46 -0500, Kathy_pdx wrote:

>> It is an IIR filter. Since the EQ coefficients need be upsampled, the
>> splines linear interpolation is not available since there is no end
>> point.
>> Due to the DSP processor constraints, the equalizer design has to be
>> operated at 16 kHz/s.

>Wait, wait.  In your original post you said that the ASIC was equipped to 
>do equalization, now you're saying that no, the equalization must happen 
>in the DSP.

>What?

I interpret this to mean that some black box being called "the DSP"
is constrained to emit a set of filter coefficients computed for
a filter running at 16 ks/sec, while some other box called "the ASIC"
is being created to (presumably among other things) use them at 192
ks/sec.

Ideally the OP will clarify.

Steve