As a bat call recording enthusiast I'd like to use a pair of digital MEMS elements whose ultrasonic performance appears to be well suited. The Knowles SPH0641LM4H-1 mic output is PDM and can run at 4.8MHz. I want to stay in digital domain, ultimately recording 16-bit PCM at 192kHz. Researching PDM-to-PCM conversion algorithms suggests low-pass filtering. Analog's ADAU7002Z PDM to I2S converter might be useful but appears to only produce 96kHz PCM. Can I, instead, integrate the 1-bit stream in a 16-bit counter, incrementing or decrementing per each clocked PDM bit at 4.8MHz, and latch the counter value at 192kHz? Thanks. Tom
Integrate PDM to PCM?
Started by ●October 13, 2016
Reply by ●October 13, 20162016-10-13
On Thu, 13 Oct 2016 09:03:48 -0700, Tom Becker wrote:> As a bat call recording enthusiast I'd like to use a pair of digital > MEMS elements whose ultrasonic performance appears to be well suited. > > The Knowles SPH0641LM4H-1 mic output is PDM and can run at 4.8MHz. I > want to stay in digital domain, ultimately recording 16-bit PCM at > 192kHz. Researching PDM-to-PCM conversion algorithms suggests low-pass > filtering. Analog's ADAU7002Z PDM to I2S converter might be useful but > appears to only produce 96kHz PCM. > > Can I, instead, integrate the 1-bit stream in a 16-bit counter, > incrementing or decrementing per each clocked PDM bit at 4.8MHz, and > latch the counter value at 192kHz?Sounds like a plan, except that there's a good chance of a DC bias that'll make your integrator run away. I'd put a DC-blocking algorithm in there someplace. If you're doing this in an FPGA it should be simplicity itself to do so; just remember that it's an IIR filter and therefor will need attention paid to data path widths. -- Tim Wescott Wescott Design Services http://www.wescottdesign.com I'm looking for work -- see my website!
Reply by ●October 13, 20162016-10-13
Tom Becker <gtbecker@rightime.com> wrote:>As a bat call recording enthusiast I'd like to use a pair of digital >MEMS elements whose ultrasonic performance appears to be well suited. > >The Knowles SPH0641LM4H-1 mic output is PDM and can run at 4.8MHz. I >want to stay in digital domain, ultimately recording 16-bit PCM at >192kHz. Researching PDM-to-PCM conversion algorithms suggests low-pass >filtering. Analog's ADAU7002Z PDM to I2S converter might be useful but >appears to only produce 96kHz PCM.>Can I, instead, integrate the 1-bit stream in a 16-bit counter, >incrementing or decrementing per each clocked PDM bit at 4.8MHz, and >latch the counter value at 192kHz?I would say this is not as likely to work as well as a lowpass filter. I would expect a build-up of low-frequency noise, and less than ideal filtering in the frequency range of interest. Most PDM streams want something more like a 3rd-order lowpass filter. If you have the opportunity to capture some of the PDM bit stream, you could try processing it in non-real time (that is, in software) to see what sort of results different methods yield. Good luck- Steve
Reply by ●October 13, 20162016-10-13
On Thu, 13 Oct 2016 19:18:47 +0000, Steve Pope wrote:> Tom Becker <gtbecker@rightime.com> wrote: > >>As a bat call recording enthusiast I'd like to use a pair of digital >>MEMS elements whose ultrasonic performance appears to be well suited. >> >>The Knowles SPH0641LM4H-1 mic output is PDM and can run at 4.8MHz. I >>want to stay in digital domain, ultimately recording 16-bit PCM at >>192kHz. Researching PDM-to-PCM conversion algorithms suggests low-pass >>filtering. Analog's ADAU7002Z PDM to I2S converter might be useful but >>appears to only produce 96kHz PCM. > >>Can I, instead, integrate the 1-bit stream in a 16-bit counter, >>incrementing or decrementing per each clocked PDM bit at 4.8MHz, and >>latch the counter value at 192kHz? > > I would say this is not as likely to work as well as a lowpass filter. > I would expect a build-up of low-frequency noise, and less than ideal > filtering in the frequency range of interest. Most PDM streams want > something more like a 3rd-order lowpass filter. > > If you have the opportunity to capture some of the PDM bit stream, you > could try processing it in non-real time (that is, in software) to see > what sort of results different methods yield.Assuming that the work is being done in an FPGA, implementing an IIR filter should be easy-peasy. I could even see this working on some DSP or plain ol' RISC chips: read bits into the SPI one byte at a time, have a look-up table for bits/byte, and then filter from there. At 600kHz, it should be do-able. Alternately, you might be able to implement a gated counter on a suitable microcontroller, with the output of that counter periodically going to an IIR. It's probably not a good thing to try for itself, but might make sense if the larger system demands a microcontroller anyway. -- www.wescottdesign.com
Reply by ●October 13, 20162016-10-13
Remember that the modulator noise might be rising rapidly above 20khz, so if you apply an 85khz or so lowpass, your SNR may drop quite profoundly. So you will miss the quiet bats. Bob
Reply by ●October 13, 20162016-10-13
> ... implement a gated counter on a suitable microcontroller, with the output of that counter periodically ...That's what I'm thinking. I am already using an ATxmega32A4 @29MHz in the box and it appears that its event system can route two pins for count and direction - and two counters can be linked for 32 bits - latched by an interrupt. Two pairs, actually, for stereo. Code would never directly see the PDM - just the much-slower periodic count samples. It won't be hard to breadboard that so I can see what comes out of the counter pretty easily. Thanks for the encouragement.> ... read bits into the SPI one byte at a time, have a look-up table for bits/byte, and then filter...I'm missing the concept. Can you expand on that? Tom
Reply by ●October 13, 20162016-10-13
On Thu, 13 Oct 2016 17:04:09 -0700, Tom Becker wrote:>> ... implement a gated counter on a suitable microcontroller, with the >> output of that counter periodically ... > > That's what I'm thinking. I am already using an ATxmega32A4 @29MHz in > the box and it appears that its event system can route two pins for > count and direction - and two counters can be linked for 32 bits - > latched by an interrupt. Two pairs, actually, for stereo. Code would > never directly see the PDM - just the much-slower periodic count > samples. > > It won't be hard to breadboard that so I can see what comes out of the > counter pretty easily. Thanks for the encouragement. > >> ... read bits into the SPI one byte at a time, have a look-up table for >> bits/byte, and then filter... > > I'm missing the concept. Can you expand on that?There's probably not enough horsepower in your ATMega, but if set up an SPI port to clock at 4.8MHz, then it'll clock in bits from the microphone, and deliver bytes to the micro. Then you have a look up table: 0 has 0 bits on, 1 has 1 bit on, 2 has 1 bit on, 3 has 2 bits on, etc. The output of that table gets 4 subtracted from it, and run into whatever follow-on filtering you want to use. -- www.wescottdesign.com
Reply by ●October 13, 20162016-10-13
On Thu, 13 Oct 2016 16:41:32 -0700, radams2000 wrote:> Remember that the modulator noise might be rising rapidly above 20khz, > so if you apply an 85khz or so lowpass, your SNR may drop quite > profoundly. So you will miss the quiet bats. > > BobI thought that really hard, but somehow Pan failed to generate a post for me automatically. Hopefully that's in the microphone's documentation. I wonder what the frequency response of a typical electret mic is -- could the OP just use one of those, with its own buffering and ADC? -- www.wescottdesign.com
Reply by ●October 14, 20162016-10-14
> ... set up an SPI port to clock at 4.8MHz [] then you have a look up table: > 0 has 0 bits on, > 1 has 1 bit on, > 2 has 1 bit on, > 3 has 2 bits on, > etc. > The output of that table gets 4 subtracted from it...Ah. So eight bits (0-255) @4.8MHz becomes three bits (0-7) @600kHz, offset by -4 makes it bipolar? So now I have 3-bit PCM @600kHz? How do I get from there to 16-bit @192kHz? Tom
Reply by ●October 14, 20162016-10-14
On Thu, 13 Oct 2016 21:20:10 -0700, Tom Becker wrote:>> ... set up an SPI port to clock at 4.8MHz [] then you have a look up >> table: >> 0 has 0 bits on, >> 1 has 1 bit on, >> 2 has 1 bit on, >> 3 has 2 bits on, >> etc. >> The output of that table gets 4 subtracted from it... > > Ah. So eight bits (0-255) @4.8MHz becomes three bits (0-7) @600kHz, > offset by -4 makes it bipolar? So now I have 3-bit PCM @600kHz? How do > I get from there to 16-bit @192kHz? > > TomLow-pass filter. See Bob Adams' concern about high-frequency noise, and my response. -- Tim Wescott Wescott Design Services http://www.wescottdesign.com I'm looking for work -- see my website!
