All-real FFT for FPGA

On 2/14/2017 7:35 PM, Steve Pope wrote:
> rickman  <gnuarm@gmail.com> wrote:
>
>> On 2/14/2017 5:48 PM, Steve Pope wrote:
>
>>> But you still wouldn't need two multpliers to compute the two
>>> values in my example; just one multiplier plus some other logic
>>> (much less than the gate count of a second multiplier) to take care of
>>> the extremal cases to make the output exactly match.
>
>> It was a *long* way around the woods to get here.  I seriously doubt any
>> logic synthesis tool is going to substitute two multipliers and an adder
>> with a single multiplier and a bunch of other logic.
>
> I very strongly disagree ... minimizing purely combinatorial logic
> is the _sine_qua_non_ of a synthesis tool.
>
> Lots of other things synthesizers try to do are more intricate and less
> predictable, but not this.

I hear you, but I don't think the tools will be able to "see" the 
simplifications as they are not strictly logic simplifications.  Most of 
it is trig.

Take a look at just how the FFT works.  The combinations of 
multiplications work out because of properties of the sine function, not 
because of Boolean logic.

-- 

Rick C