DSPRelated.com
Forums

Complex Sampling Techniques

Started by MikeEdmans May 18, 2006
On Thu, 18 May 2006 07:43:21 -0500, "MikeEdmans"
<mike.edmans@tiscali.co.uk> wrote:

>Hello out there, > > >I am confused about hardware implementation of complex sampling. Can I >just set up two ADCs sampling at the same rate, but with their clock >signals 90 degrees out of phase, or do I actually need to multiply my >input signal by a sine-wave? > >I assume that by sampling with 2 ADCs with out-of-phase clocks, this is >the equivalent of multiplying by complex sine wave which is in phase with >the sampling clock. Does this work? > >Thanks for your help!
Hi Mike, Assuming what you call "complex sampling" is the same process that I call "complex sampling", there are 3-4 different ways to accomplish this process. Which of those schemes to use depends on things like the bandwidth of your real signal (relative to Fs), the real signal's center frequency, and whether you want your complex signal to be centered at 0 Hz or at some higher frequency. I discuss those different schemes in my DSP book. Now I'm not "pushing" you to buy my book. Maybe you can find it in a library. (Photocopy the last few pages of Chap 8 and Chap 9). It seems to me that Marvin Frerking's DSP book and Fred Harris' multirate DSP book also discuss "complex sampling". I'm not being "cagey" here Mike. It's just that I don't know of a website where all the various "complex sampling" schemes are described and then compared with each other. If you're searching the Web, search on "quadrature sampling" as well as "complex sampling". I just learned of a new (new to me) efficient I/Q sampling scheme proposed twenty years ago by DSP pioneer Charles Rader. He uses two all-pass filters that have a 90-degree phase shift between them. Rader's paper is: [C. M. Rader, "A Simple Method for Sampling In- Phase and Quadrature Components," IEEE Trans. Aerospace and Electronic Syst.,vol. 20, no. 6, pp. 821-824, Nov. 1984.] I'd have to think a lot more about this idea of having "two ADCs running out of phase with each other" before I'd be convinced that it works. Using this technique, you'd have two signal sample sequences but those two sequences would not be time-aligned. That scares me. (I think my discomfort about this scheme may be the same as what John Monro was talkin' about.) Anyway Mike, Good Luck, [-Rick-]
Rick Lyons wrote:
> On Thu, 18 May 2006 07:43:21 -0500, "MikeEdmans" > <mike.edmans@tiscali.co.uk> wrote: > >> Hello out there, >> >> >> I am confused about hardware implementation of complex sampling. Can I >> just set up two ADCs sampling at the same rate, but with their clock >> signals 90 degrees out of phase, or do I actually need to multiply my >> input signal by a sine-wave? >> >> I assume that by sampling with 2 ADCs with out-of-phase clocks, this is >> the equivalent of multiplying by complex sine wave which is in phase with >> the sampling clock. Does this work? >> >> Thanks for your help! > > Hi Mike, > > Assuming what you call "complex sampling" is > the same process that I call "complex sampling", > there are 3-4 different ways to accomplish this > process. > > Which of those schemes to use depends on things > like the bandwidth of your real signal (relative > to Fs), the real signal's center frequency, > and whether you want your complex signal to be centered > at 0 Hz or at some higher frequency. > > I discuss those different schemes in my DSP > book. Now I'm not "pushing" you to buy my book. > Maybe you can find it in a library. > (Photocopy the last few pages of Chap 8 and Chap 9). > It seems to me that Marvin Frerking's DSP book and > Fred Harris' multirate DSP book also discuss > "complex sampling". > > I'm not being "cagey" here Mike. It's just that > I don't know of a website where all the > various "complex sampling" schemes are described > and then compared with each other. > > If you're searching the Web, search on "quadrature > sampling" as well as "complex sampling". > > I just learned of a new (new to me) efficient > I/Q sampling scheme proposed twenty years > ago by DSP pioneer Charles Rader. > He uses two all-pass filters that have > a 90-degree phase shift between them. Rader's > paper is: > [C. M. Rader, "A Simple Method for Sampling In- > Phase and Quadrature Components," IEEE Trans. Aerospace > and Electronic Syst.,vol. 20, no. 6, pp. 821-824, > Nov. 1984.]
I haven't seen the paper, but can you explain the novelty in a couple of sentances? You said all-pass, but surely if they are all pass you only need one filter - a hilbert transformer. In comms systems I and Q and often created by using a pair of filters to pulse shape the signal, and provide 90 degree different phase shifts at the same time. That's neat, because you kill two birds with one stone. Is that the kind of thing you mean, because I think the cavemen were using that technique?
> I'd have to think a lot more about this idea > of having "two ADCs running out of phase with > each other" before I'd be convinced that it works. > Using this technique, you'd have two signal > sample sequences but those two sequences would not > be time-aligned. That scares me. > (I think my discomfort about this scheme may be > the same as what John Monro was talkin' about.)
He is effectively sampling at 4 times the required rate, taking a sample as I, a sample as Q, throwing 2 samples away and repeating. Does that look like complex sampling? Regards, Steve
Steve Underwood wrote:
> Rick Lyons wrote:
would not
> > be time-aligned. That scares me. > > (I think my discomfort about this scheme may be > > the same as what John Monro was talkin' about.) > > He is effectively sampling at 4 times the required rate, taking a sample > as I, a sample as Q, throwing 2 samples away and repeating. Does that > look like complex sampling?
It certainly looks like *complicated* sampling... Rune
The method will not work for a chirp signal, so I have to agree with
those that say this it at best a bad idea to implement a complex
sampling that will only work in an extremely  limited case.

Steve Underwood wrote:

  ...

> I haven't seen the paper, but can you explain the novelty in a couple of > sentances? You said all-pass, but surely if they are all pass you only > need one filter - a hilbert transformer. In comms systems I and Q and > often created by using a pair of filters to pulse shape the signal, and > provide 90 degree different phase shifts at the same time. That's neat, > because you kill two birds with one stone. Is that the kind of thing you > mean, because I think the cavemen were using that technique?
A pair of matched-amplitude all-pass filters whose outputs are in quadrature (but neither of which is linear phase) can be computationally cheaper than a low-ripple broadband Hilbert transformer. I know how to make the filter pair with analog circuits (three op-amps each for a decade bandwidth), I've never even heard of an analog HT. Jerry -- Engineering is the art of making what you want from things you can get. &#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;
John Monro wrote:

> Tim Wescott wrote: > >> Jerry Avins wrote: >> >>> Tim Wescott wrote: >>> >>> >>>> MikeEdmans wrote: >>>> >>>> >>>>> Hello out there, >>>>> >>>>> >>>>> I am confused about hardware implementation of complex sampling. Can I >>>>> just set up two ADCs sampling at the same rate, but with their clock >>>>> signals 90 degrees out of phase, or do I actually need to multiply my >>>>> input signal by a sine-wave? >>>>> >>>>> I assume that by sampling with 2 ADCs with out-of-phase clocks, >>>>> this is >>>>> the equivalent of multiplying by complex sine wave which is in >>>>> phase with >>>>> the sampling clock. Does this work? >>>>> >>>>> Thanks for your help! >>>>> >>>>> >>>> >>>> Yes you can just sample with two ADCs with clocks that are 90 degrees >>>> out of phase. I've never done it this way; I'd look for problems >>>> having >>>> to do with dealing with DC bias and mismatch between the ADCs, but it >>>> should work. >>> >>> >>> >>> >>> How is that different from sampling at twice the rate with a single ADC >>> and assigning alternate samples to I and Q? If the scheme works in >>> general -- there are special cases where it does work -- every normal >>> sampling at 2k*f_max (k>1) is identical to complex sampling at k*f_max. >>> Intuition says no. >>> >>> Jerry >> >> >> >> With 90 degrees between clocks you're sampling like this: >> IQ..IQ..IQ..IQ.. >> >> Your method is essentially 180 degrees between clocks, like this: >> IQIQIQIQIQIQIQIQ. >> >> Not only is it harder to pronounce, but your method doesn't give you >> that essential 90 degrees of phase difference. >> >> Were I doing this sort of thing, and had I a fast enough ADC, I'd >> sample like ABabABabABab, and I'd keep I = A - a and Q = B - b (which >> is really just a dead-simple digital quadrature mix-and-sample). >> > > Tim, > I can't see that having a 90 degree offset between clocks does you much > good. The signal samples from the 'Q' channel will have a phase of 45 > degrees at Fs/2, decreasing towards a phase of zero degrees at DC. As > far as I can see there are no analytic signals present at any frequency > in the 'IQ' sample stream that is produced, and so you would not obtain > the benefit of 'normal' IQ sampling in respect to alias suppression. It > would seem to be more productive to simply sample at twice the rate *as > with Jerry's 'IQIQIQIQ...' suggestion. > > Maybe I am missing something. Has anyone actually tried this method and > got it to work? In particular, can you sample signals with components > up to Fs using this method, without producing aliases below Fs? > > Regards, > John
Look at any of the IQ demodulators out there from Maxim, Linear, whoever. They multiply the signal by cos(wt) for the I channel, and sin(wt) for the Q channel. This scheme does exactly that. Now, I did assume that this guy is interested in sampling an IF signal to get a baseband complex signal -- if that's what he's trying, his scheme will work (but probably with flaws). -- Tim Wescott Wescott Design Services http://www.wescottdesign.com Posting from Google? See http://cfaj.freeshell.org/google/ "Applied Control Theory for Embedded Systems" came out in April. See details at http://www.wescottdesign.com/actfes/actfes.html
On Fri, 19 May 2006 08:30:07 -0700, Tim Wescott <tim@seemywebsite.com>
wrote:

>John Monro wrote: > >> Tim Wescott wrote: >> >>> Jerry Avins wrote: >>> >>>> Tim Wescott wrote: >>>> >>>> >>>>> MikeEdmans wrote: >>>>> >>>>> >>>>>> Hello out there, >>>>>> >>>>>> >>>>>> I am confused about hardware implementation of complex sampling. Can I >>>>>> just set up two ADCs sampling at the same rate, but with their clock >>>>>> signals 90 degrees out of phase, or do I actually need to multiply my >>>>>> input signal by a sine-wave? >>>>>> >>>>>> I assume that by sampling with 2 ADCs with out-of-phase clocks, >>>>>> this is >>>>>> the equivalent of multiplying by complex sine wave which is in >>>>>> phase with >>>>>> the sampling clock. Does this work? >>>>>> >>>>>> Thanks for your help! >>>>>> >>>>>> >>>>> >>>>> Yes you can just sample with two ADCs with clocks that are 90 degrees >>>>> out of phase. I've never done it this way; I'd look for problems >>>>> having >>>>> to do with dealing with DC bias and mismatch between the ADCs, but it >>>>> should work. >>>> >>>> >>>> >>>> >>>> How is that different from sampling at twice the rate with a single ADC >>>> and assigning alternate samples to I and Q? If the scheme works in >>>> general -- there are special cases where it does work -- every normal >>>> sampling at 2k*f_max (k>1) is identical to complex sampling at k*f_max. >>>> Intuition says no. >>>> >>>> Jerry >>> >>> >>> >>> With 90 degrees between clocks you're sampling like this: >>> IQ..IQ..IQ..IQ.. >>> >>> Your method is essentially 180 degrees between clocks, like this: >>> IQIQIQIQIQIQIQIQ. >>> >>> Not only is it harder to pronounce, but your method doesn't give you >>> that essential 90 degrees of phase difference. >>> >>> Were I doing this sort of thing, and had I a fast enough ADC, I'd >>> sample like ABabABabABab, and I'd keep I = A - a and Q = B - b (which >>> is really just a dead-simple digital quadrature mix-and-sample). >>> >> >> Tim, >> I can't see that having a 90 degree offset between clocks does you much >> good. The signal samples from the 'Q' channel will have a phase of 45 >> degrees at Fs/2, decreasing towards a phase of zero degrees at DC. As >> far as I can see there are no analytic signals present at any frequency >> in the 'IQ' sample stream that is produced, and so you would not obtain >> the benefit of 'normal' IQ sampling in respect to alias suppression. It >> would seem to be more productive to simply sample at twice the rate *as >> with Jerry's 'IQIQIQIQ...' suggestion. >> >> Maybe I am missing something. Has anyone actually tried this method and >> got it to work? In particular, can you sample signals with components >> up to Fs using this method, without producing aliases below Fs? >> >> Regards, >> John > >Look at any of the IQ demodulators out there from Maxim, Linear, >whoever. They multiply the signal by cos(wt) for the I channel, and >sin(wt) for the Q channel. This scheme does exactly that.
No, I think it doesn't. Picking a sampling instant doesn't equate to multiplication by a sinusoid. One can post-multiply digitally in many cases (e.g., a synchronous demodulator) and that's best done with a single ADC in order to avoid gain/balance mismatches between two ADCs (even though some "single" ADCs are actually implemented with multiple converters these days). I don't see how just changing the phases between two sampling clocks equates to downconversion, which seems to be what was implied by this discussion.
>Now, I did assume that this guy is interested in sampling an IF signal >to get a baseband complex signal -- if that's what he's trying, his >scheme will work (but probably with flaws).
I don't think it will. Eric Jacobsen Minister of Algorithms, Intel Corp. My opinions may not be Intel's opinions. http://www.ericjacobsen.org
Eric Jacobsen wrote:

  ...

> Picking a sampling instant doesn't equate to multiplication by a > sinusoid. One can post-multiply digitally in many cases (e.g., a > synchronous demodulator) and that's best done with a single ADC in > order to avoid gain/balance mismatches between two ADCs (even though > some "single" ADCs are actually implemented with multiple converters > these days).
In some cases it can. If the multiplying sinusoids are 1/4 the sampling frequency, the sine is [0 1 0 -1 ...] and the cosine [1 0 -1 0 ...]. Those samples can all be taken by a single DAC, alternating I and Q channels. ... Jerry -- Engineering is the art of making what you want from things you can get. &#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;&#4294967295;
On Fri, 19 May 2006 14:47:30 -0400, Jerry Avins <jya@ieee.org> wrote:

>Eric Jacobsen wrote: > > ... > >> Picking a sampling instant doesn't equate to multiplication by a >> sinusoid. One can post-multiply digitally in many cases (e.g., a >> synchronous demodulator) and that's best done with a single ADC in >> order to avoid gain/balance mismatches between two ADCs (even though >> some "single" ADCs are actually implemented with multiple converters >> these days). > >In some cases it can. If the multiplying sinusoids are 1/4 the sampling >frequency, the sine is [0 1 0 -1 ...] and the cosine [1 0 -1 0 ...]. >Those samples can all be taken by a single DAC, alternating I and Q >channels.
>Jerry
Yes, that's the "synchronous demodulator" that I mentioned, and it still requires post-multiplication by +/-1, as well as eventual realignment by filtering. In other words, you can't just get downconversion by picking sampling points. You can possibly reduce some computation (like with synchronous demodulation) by judiciously picking sampling instances, but the tradeoff isn't always straightforward or obvious. Eric Jacobsen Minister of Algorithms, Intel Corp. My opinions may not be Intel's opinions. http://www.ericjacobsen.org
Eric Jacobsen wrote:
> On Fri, 19 May 2006 08:30:07 -0700, Tim Wescott <tim@seemywebsite.com> > wrote: > > >>John Monro wrote: >> >> >>>Tim Wescott wrote: >>> >>> >>>>Jerry Avins wrote: >>>> >>>> >>>>>Tim Wescott wrote: >>>>> >>>>> >>>>> >>>>>>MikeEdmans wrote: >>>>>> >>>>>> >>>>>> >>>>>>>Hello out there, >>>>>>> >>>>>>> >>>>>>>I am confused about hardware implementation of complex sampling. Can I >>>>>>>just set up two ADCs sampling at the same rate, but with their clock >>>>>>>signals 90 degrees out of phase, or do I actually need to multiply my >>>>>>>input signal by a sine-wave? >>>>>>> >>>>>>>I assume that by sampling with 2 ADCs with out-of-phase clocks, >>>>>>>this is >>>>>>>the equivalent of multiplying by complex sine wave which is in >>>>>>>phase with >>>>>>>the sampling clock. Does this work? >>>>>>> >>>>>>>Thanks for your help! >>>>>>> >>>>>>> >>>>>> >>>>>>Yes you can just sample with two ADCs with clocks that are 90 degrees >>>>>>out of phase. I've never done it this way; I'd look for problems >>>>>>having >>>>>>to do with dealing with DC bias and mismatch between the ADCs, but it >>>>>>should work. >>>>> >>>>> >>>>> >>>>> >>>>>How is that different from sampling at twice the rate with a single ADC >>>>>and assigning alternate samples to I and Q? If the scheme works in >>>>>general -- there are special cases where it does work -- every normal >>>>>sampling at 2k*f_max (k>1) is identical to complex sampling at k*f_max. >>>>>Intuition says no. >>>>> >>>>>Jerry >>>> >>>> >>>> >>>>With 90 degrees between clocks you're sampling like this: >>>>IQ..IQ..IQ..IQ.. >>>> >>>>Your method is essentially 180 degrees between clocks, like this: >>>>IQIQIQIQIQIQIQIQ. >>>> >>>>Not only is it harder to pronounce, but your method doesn't give you >>>>that essential 90 degrees of phase difference. >>>> >>>>Were I doing this sort of thing, and had I a fast enough ADC, I'd >>>>sample like ABabABabABab, and I'd keep I = A - a and Q = B - b (which >>>>is really just a dead-simple digital quadrature mix-and-sample). >>>> >>> >>>Tim, >>>I can't see that having a 90 degree offset between clocks does you much >>>good. The signal samples from the 'Q' channel will have a phase of 45 >>>degrees at Fs/2, decreasing towards a phase of zero degrees at DC. As >>>far as I can see there are no analytic signals present at any frequency >>>in the 'IQ' sample stream that is produced, and so you would not obtain >>>the benefit of 'normal' IQ sampling in respect to alias suppression. It >>>would seem to be more productive to simply sample at twice the rate *as >>>with Jerry's 'IQIQIQIQ...' suggestion. >>> >>>Maybe I am missing something. Has anyone actually tried this method and >>>got it to work? In particular, can you sample signals with components >>>up to Fs using this method, without producing aliases below Fs? >>> >>>Regards, >>>John >> >>Look at any of the IQ demodulators out there from Maxim, Linear, >>whoever. They multiply the signal by cos(wt) for the I channel, and >>sin(wt) for the Q channel. This scheme does exactly that. > > > No, I think it doesn't. > > Picking a sampling instant doesn't equate to multiplication by a > sinusoid. One can post-multiply digitally in many cases (e.g., a > synchronous demodulator) and that's best done with a single ADC in > order to avoid gain/balance mismatches between two ADCs (even though > some "single" ADCs are actually implemented with multiple converters > these days). > > I don't see how just changing the phases between two sampling clocks > equates to downconversion, which seems to be what was implied by this > discussion. > > >>Now, I did assume that this guy is interested in sampling an IF signal >>to get a baseband complex signal -- if that's what he's trying, his >>scheme will work (but probably with flaws). > > > I don't think it will.
Ignore mismatched ADCs for the moment (which is one of the difficulties I was alluding to in my original post). Consider the inphase ADC as multiplying the signal by a train of impulses: sum from {k = -infinity} to infinity {delta(t - kT)} This impulse train has the Fourier series sum from {p = -infinity} to infinity {exp(i * p 2 pi t / T))}, whose fundamental is just cos(2 pi t / T) Now consider the quadrature ADC as multiplying the signal by a train of impulses: sum from {k = -infinity} to infinity {delta(t - kT - T/4)} This impulse train has the Fourier series sum from {p = -infinity} to infinity {exp(i * p pi (2t - 1/2) / T ))}, whose fundamental is just sin(2 pi t / T). So _at the sampling rate_ you are effectively doing quadrature downsampling. Everywhere else you're either magnifying or at least not suppressing all the ADC peculiarities, but _at the sampling rate_ its quadrature downsampling. -- Tim Wescott Wescott Design Services http://www.wescottdesign.com Posting from Google? See http://cfaj.freeshell.org/google/ "Applied Control Theory for Embedded Systems" came out in April. See details at http://www.wescottdesign.com/actfes/actfes.html