biff wrote:> On Jul 1, 11:16 pm, Tim Wescott <t...@seemywebsite.com> wrote: >> biff wrote: >>> On Jul 1, 10:01 pm, Tim Wescott <t...@seemywebsite.com> wrote: >>>> biff wrote: >>>>> Hi folks, >>>>> I manage a hardware engineering group for a telcom company and I am >>>>> beginning to look around for FPGA IP to implement both FSK modulation >>>>> and demodulation. I am wondering if any of you have any experience >>>>> with any of the IP around today. The demodulator is the most difficult >>>>> part and I believe the following list of requirements is fairly close: >>>>> * 300 KHz bandwidth >>>>> * 5-21 MHz frequency range >>>>> * bit rate = 39.4 KHz >>>>> * modulation FSK, �f = 75 kHz � 10 KHz, fMark = fc+�f, fSpace = fc-�f >>>>> The modulator would have similar requirements. Any suggestions would >>>>> be appreciated. My shop uses both Xilinix and Altera. While we are >>>>> most comfortable with FPGAs, a DSP would also be a possibility if good >>>>> software is available. >>>>> If you think that IP would not be the best choice and another approach >>>>> would be better, feel free to make a suggestion. >>>>> Biff >>>> FSK is pretty easy. This is an elementary enough problem that by the >>>> time you finish evaluating IP and integrating it into your design you've >>>> spent more money than you would just designing it, or hiring it done >>>> custom for you. >>>> So I suspect that no one bothers making IP for it. >>> Hiring someone would be an option. >>>> From your specs I gather that you aren't looking for coherent >>>> demodulation. Are you looking at a nice clean signal going into the >>>> FPGA, or are you coming off of ADCs and wanting to get near-optimal >>>> detection? >>> The incoming signal is between 10 and 50 dBmV off of a 75 ohm coaxial >>> cable (cable TV application). In general the SNR is >20 dB. So the >>> signal is large and fairly clean. I am looking for suggestions on what >>> to do. My primary focus right now is getting an estimate of the amount >>> of effort associated with this development so I can put together a >>> proposal. This includes an estimate of the some of the basic FPGA >>> requirements. Things like sample rate, quantization, etc. >> "Lots". There, isn't that helpful? This is definitely a 'devil's in >> the details' sort of problem, so whether you need lots of hours, lots of >> days or lots of weeks depends (ehem) lots on those details. >> >> Is the FSK signal to all other energy better than 20dB, or does the FSK >> signal have to be filtered out from the background? > > There are other signals on the coax, but analog filters (a diplexer > and passive filter) will filter them out before they get to this > hardware. >That, and the fact that this seems to be a cable TV network (outdoors) tells me that there should be an analog filter and downconvert process. Just as Tim had hinted. Doing it all straight baseband would require a 50MSPS+ converter and getting any reasonable dynamic range out of that concept can prove prohibitively expensive. If the carrier frequency must be very agile there are ways to do that even with a mostly analog concept. Multi-loop PLL, DDS etc.>> Is the carrier >> frequency known ahead of time? > > We will know the carrier ahead of time. An enhancement in the future > would make the carrier programmable, but this feature would not be > needed initially. I would like the FPGA to be sized to support this as > a future feature. >Can also be done with the semi-analog concept. Small uC does the FSK mod/demod and also controls the PLL or DDS. Or initiates a scan to scout the range for the carrier frequency if not known a priori.>> How close are any other interfering signals? >> >> I assume that you'll want to have some sort of sample -> bandpass filter >> -> heterodyne -> demodulate -> data slice architecture. > > That is what I put in my initial concept proposal. Remember my only > formal DSP training was 25 years ago. I am an analog circuit designer > by training. > >> If you want to >> do it all digitally and you have to go up to 21MHz that implies sampling >> well above 42MHz -- 60 would probably be a practical minimum, but you >> could save money on your anti-aliasing filter by going higher. You'll >> have a lot of gain in the bandpass filter, so there's a chance that you >> can do this with a low-bit-count ADC -- the answer to that question >> depends on more information than you've given, although if the FSK >> signal were the _only_ signal on the wire then you could do it with a >> comparator. > > At this point, the only signal in that band is the FSK signal. What I > put in my proposal was > > * analog front (RF diplexer, filter, amplifier)I'd add a mixer here. Either IF, then DSP. Or I/Q demod and a cheaper DSP, possibly even a uC. You might need all the dynamic range you can get. Just imagine a cable running along the street and through one of those green boxes. Next to the box is uncle Leroy's garage where he often uses a humongous arc welder ...> * A/D converter > * numerical oscillator for mixing > * detector > > My assumption was that I could mix the signal down (possibly flip the > spectrum) so that my space symbol is at DeltaF and my mark symbol is > at 0 Hz (DC). I can then filter the DeltaF out with a low-pass filter, > leaving me with the bit stream. > > I have Matlab and I have started to play with simulation. It seemed to > work. It seemed too simple. >In MatLab everything tends to look simple. The you price out a DSP and the $$$-number for more than 16bit FP versions causes one to choke for a moment. Same for big FPGA. And they can also consume an enormous amount of power, all of which then needs to be removed from the box as heat. If you want to contract some of this out these guys know a lot about signal processing in FPGA and DSP: http://www.bartels.de/ Write to Oliver, and say hello for me. They are usually very busy so no idea if they'd have available resources right now. Also, they will insist of an iron-clad set of specs just like every other professional designer would. Such as EMI load and so on. -- Regards, Joerg http://www.analogconsultants.com/ "gmail" domain blocked because of excessive spam. Use another domain or send PM.
FSK Demodulator
Started by ●July 1, 2008
Reply by ●July 2, 20082008-07-02
Reply by ●July 2, 20082008-07-02
Joerg wrote: [...] Why piling up the complicated digital stuff in the place where a 25c analog FM receiver IC with some external components would probably do? Vladimir Vassilevsky DSP and Mixed Signal Design Consultant http://www.abvolt.com> biff wrote: > >> On Jul 1, 11:16 pm, Tim Wescott <t...@seemywebsite.com> wrote: >> >>> biff wrote: >>> >>>> On Jul 1, 10:01 pm, Tim Wescott <t...@seemywebsite.com> wrote: >>>> >>>>> biff wrote: >>>>> >>>>>> Hi folks, >>>>>> I manage a hardware engineering group for a telcom company and I am >>>>>> beginning to look around for FPGA IP to implement both FSK modulation >>>>>> and demodulation. I am wondering if any of you have any experience >>>>>> with any of the IP around today. The demodulator is the most >>>>>> difficult >>>>>> part and I believe the following list of requirements is fairly >>>>>> close: >>>>>> * 300 KHz bandwidth >>>>>> * 5-21 MHz frequency range >>>>>> * bit rate = 39.4 KHz >>>>>> * modulation FSK, �f = 75 kHz � 10 KHz, fMark = fc+�f, fSpace = fc-�f >>>>>> The modulator would have similar requirements. Any suggestions would >>>>>> be appreciated. My shop uses both Xilinix and Altera. While we are >>>>>> most comfortable with FPGAs, a DSP would also be a possibility if >>>>>> good >>>>>> software is available. >>>>>> If you think that IP would not be the best choice and another >>>>>> approach >>>>>> would be better, feel free to make a suggestion. >>>>>> Biff >>>>> >>>>> FSK is pretty easy. This is an elementary enough problem that by the >>>>> time you finish evaluating IP and integrating it into your design >>>>> you've >>>>> spent more money than you would just designing it, or hiring it done >>>>> custom for you. >>>>> So I suspect that no one bothers making IP for it. >>>> >>>> Hiring someone would be an option. >>>> >>>>> From your specs I gather that you aren't looking for coherent >>>>> demodulation. Are you looking at a nice clean signal going into the >>>>> FPGA, or are you coming off of ADCs and wanting to get near-optimal >>>>> detection? >>>> >>>> The incoming signal is between 10 and 50 dBmV off of a 75 ohm coaxial >>>> cable (cable TV application). In general the SNR is >20 dB. So the >>>> signal is large and fairly clean. I am looking for suggestions on what >>>> to do. My primary focus right now is getting an estimate of the amount >>>> of effort associated with this development so I can put together a >>>> proposal. This includes an estimate of the some of the basic FPGA >>>> requirements. Things like sample rate, quantization, etc. >>> >>> "Lots". There, isn't that helpful? This is definitely a 'devil's in >>> the details' sort of problem, so whether you need lots of hours, lots of >>> days or lots of weeks depends (ehem) lots on those details. >>> >>> Is the FSK signal to all other energy better than 20dB, or does the FSK >>> signal have to be filtered out from the background? >> >> >> There are other signals on the coax, but analog filters (a diplexer >> and passive filter) will filter them out before they get to this >> hardware. >> > > That, and the fact that this seems to be a cable TV network (outdoors) > tells me that there should be an analog filter and downconvert process. > Just as Tim had hinted. > > Doing it all straight baseband would require a 50MSPS+ converter and > getting any reasonable dynamic range out of that concept can prove > prohibitively expensive. > > If the carrier frequency must be very agile there are ways to do that > even with a mostly analog concept. Multi-loop PLL, DDS etc. > > >>> Is the carrier >>> frequency known ahead of time? >> >> >> We will know the carrier ahead of time. An enhancement in the future >> would make the carrier programmable, but this feature would not be >> needed initially. I would like the FPGA to be sized to support this as >> a future feature. >> > > Can also be done with the semi-analog concept. Small uC does the FSK > mod/demod and also controls the PLL or DDS. Or initiates a scan to scout > the range for the carrier frequency if not known a priori. > > >>> How close are any other interfering signals? >>> >>> I assume that you'll want to have some sort of sample -> bandpass filter >>> -> heterodyne -> demodulate -> data slice architecture. >> >> >> That is what I put in my initial concept proposal. Remember my only >> formal DSP training was 25 years ago. I am an analog circuit designer >> by training. >> >>> If you want to >>> do it all digitally and you have to go up to 21MHz that implies sampling >>> well above 42MHz -- 60 would probably be a practical minimum, but you >>> could save money on your anti-aliasing filter by going higher. You'll >>> have a lot of gain in the bandpass filter, so there's a chance that you >>> can do this with a low-bit-count ADC -- the answer to that question >>> depends on more information than you've given, although if the FSK >>> signal were the _only_ signal on the wire then you could do it with a >>> comparator. >> >> >> At this point, the only signal in that band is the FSK signal. What I >> put in my proposal was >> >> * analog front (RF diplexer, filter, amplifier) > > > > I'd add a mixer here. Either IF, then DSP. Or I/Q demod and a cheaper > DSP, possibly even a uC. > > You might need all the dynamic range you can get. Just imagine a cable > running along the street and through one of those green boxes. Next to > the box is uncle Leroy's garage where he often uses a humongous arc > welder ... > > >> * A/D converter >> * numerical oscillator for mixing >> * detector >> >> My assumption was that I could mix the signal down (possibly flip the >> spectrum) so that my space symbol is at DeltaF and my mark symbol is >> at 0 Hz (DC). I can then filter the DeltaF out with a low-pass filter, >> leaving me with the bit stream. >> >> I have Matlab and I have started to play with simulation. It seemed to >> work. It seemed too simple. >> > > In MatLab everything tends to look simple. The you price out a DSP and > the $$$-number for more than 16bit FP versions causes one to choke for a > moment. Same for big FPGA. And they can also consume an enormous amount > of power, all of which then needs to be removed from the box as heat. > > If you want to contract some of this out these guys know a lot about > signal processing in FPGA and DSP: > http://www.bartels.de/ > > Write to Oliver, and say hello for me. They are usually very busy so no > idea if they'd have available resources right now. Also, they will > insist of an iron-clad set of specs just like every other professional > designer would. Such as EMI load and so on. >
Reply by ●July 2, 20082008-07-02
Vladimir Vassilevsky wrote:> > > Joerg wrote: > > [...] > > Why piling up the complicated digital stuff in the place where a 25c > analog FM receiver IC with some external components would probably do? >For the RF part you can use a chip if it offers good dynamic range. Many don't. For the decode part the OP might need some more flexibility than an RF chip can provide. RF chips aren't widely available for the 5-21MHz range. They are marketed for the classic ISM bands although some of them might be "convinced" to drop to shortwave with some clever circuitry. -- Regards, Joerg http://www.analogconsultants.com/ "gmail" domain blocked because of excessive spam. Use another domain or send PM.
Reply by ●July 2, 20082008-07-02
Joerg wrote:> Vladimir Vassilevsky wrote: > >> Joerg wrote: >> >> [...] >> >> Why piling up the complicated digital stuff in the place where a 25c >> analog FM receiver IC with some external components would probably do? >> > For the RF part you can use a chip if it offers good dynamic range.An IC with a good dynamic range sounds very promising :)> Many > don't. For the decode part the OP might need some more flexibility than > an RF chip can provide. > > RF chips aren't widely available for the 5-21MHz range. They are > marketed for the classic ISM bands although some of them might be > "convinced" to drop to shortwave with some clever circuitry.I meant using a conventional FM receiver IC. The standard crystal filters seem to fit the OP's application. All that has to be done is pull the synthethiser into the 15...32 MHz range. Vladimir Vassilevsky DSP and Mixed Signal Design Consultant http://www.abvolt.com
Reply by ●July 2, 20082008-07-02
Vladimir Vassilevsky wrote:> > > Joerg wrote: > >> Vladimir Vassilevsky wrote: >> >>> Joerg wrote: >>> >>> [...] >>> >>> Why piling up the complicated digital stuff in the place where a 25c >>> analog FM receiver IC with some external components would probably do? >>> >> For the RF part you can use a chip if it offers good dynamic range. > > An IC with a good dynamic range sounds very promising :) >Once in a while it happens. That's why I squirreled away a stash of SL5440 mixers just before Plessey went out of business. Hands down the best integrated mixer this planet has ever seen.>> Many don't. For the decode part the OP might need some more >> flexibility than an RF chip can provide. >> >> RF chips aren't widely available for the 5-21MHz range. They are >> marketed for the classic ISM bands although some of them might be >> "convinced" to drop to shortwave with some clever circuitry. > > I meant using a conventional FM receiver IC. The standard crystal > filters seem to fit the OP's application. All that has to be done is > pull the synthethiser into the 15...32 MHz range. >Yes, you can use those. But from a performance perspective most are, as Archie Bunker would have put it, lousay. I've tried a few, didn't like any of them. The millisecond a strong signal showed up they keeled over. If the telco app in this case guarantees there won't be any signal levels out of the ordinary it may be ok. But one must always assume cable faults and such and consider whether the appliactions still has to continue working under fault conditions. -- Regards, Joerg http://www.analogconsultants.com/ "gmail" domain blocked because of excessive spam. Use another domain or send PM.
