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Frame Grabber using FPGA thru webcam

Started by syyang85 December 19, 2007
Hello,

I'm a student doing a project on implementing optical flow algorithm
into FPGA.
Basically, i would like to mount a camera ( preferably webcam coz its
cheap) onto a FPGA( my college currently has up2 and up3 @ltera
education board) and it do some image/video processing in FPGA and
display in an LCD or CRT monitor.

As for my part, I'm doing the input part. That is getting the
data(image frames) ready for calculation in the FPGA. the Frame
Grabber should grab image frames from the camera and converts it into
gray-scale and saves it in Matrix form or what ever meaningful form.
It's quite a challenging project Very Happy so, I need all the
advise/help that all I can get.
>From what I read throughout the forum. Is true that is the least
practical to use a USB device on FPGA? The up3 board that I'm using
has USB port, so I was thinking of just using my cheap webcam that
I've already own. What do I need to prepare if I decide to use the USB
webcam? I found out that there's a USB port in up3 board and there is
ip-core on USB in opencore.org. What other better alternatives do you
guys suggest? and what other advises would give regarding my project
on the Frame grabber.

I found some open source driver for my logitech quickcam express in
other linux forums.
So, i was thinking whether i could read up the source code of the
driver and try to figure out which codes commands the webcam.

On the ipcore issue. I found some usb 1.1 host and slave controllers
ip cores in opencore.org. I quite new to this usb interface. Since
host(fpga) commands the slave(webcam) what to do. does it mean that
after I can use the codes that i have derived from the linux driver
then i can use the code on the host controller to command the webcam
to some operations? Or the usb host/slave controller just manages the
interface only and do not do any processing operations.

On the other hand, i need to save the image into a memory. So, i need
memory ip core, right? And the most difficult part wud the image
processing. I havent found any image processing ip cores at the
moment. I need to resize the image and change it in grayscale form.
Could i build those operations in Matlab/dsp builder? Any dsp builder
experience user here? haha.

Anyhow, on the final issue. How do i or more importantly could i join
the the ipcores with the circuit that i have built in dsp
builder/simulink/matlab?

If the above strategies could not work then i might just install a
soft processor into the fpga and install uclinux and do the image
processing in C++.

Any ideas? which strategy is more feasible?