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hi all, i am trying to implement a 32 bit syncronous counter using timer D module of dsp56f801a60, timer 2 and timer3 configured as follows timer2 **************** count mode= gated count mode , primary input source=timer2 input pin (13MHz) Secondary clock source=timer1 input pin (1 sec Gate signal) ***************** timer 3 settings count mode= Cascaded count mode , primary input source=timer2 output Secondary clock source=timer1 input pin (1 sec Gate signal) ideally for 1 sec gate signal the count value for 32 bit counter should read 13 Million +-1 error what i am reading is 13Million -timer3 count+30 i am unable to explain why the error is this much . my only anticipation is that timer 2 and timer3 are not working as syncronous counters. is this error dependent on ipbus clock in anyway . hoping for valuable suggestions thank you shridhar joshi |
Quad timer in Cascaded count Mode
Started by ●March 17, 2004
