Hi.  I'm using the Matlab Filter Wizard app to design receive and transmit filters for the Analog Devices AD9361 transceiver chip.  A couple of questions that have come up are 1) As I narrow the bandwidth of the FIR filters while keeping the sample rate the same, stopband attenuation and passband flatness seem to get worse.  At a ratio of about 5:1 sample rate to filter bandwidth, things are good, and I can get upwards of 90 dB stopband attenuation and ~0.025 dB passband ripple.  I need to get to about 50:1, though, but I have found that even at 10:1 or so, it's more like 75 dB stopband attenuation and several dB of ripple!  I can adjust the halfband and FIR filter decimation or interpolation ratios, but they seem to make things worse rather than better.  Is there a trick I can use to get better performance at higher ratios?

2) At 9 MHz single-sided BW and 51.2 MHz sample rate, the Wizard tells me I have 1.37 ns group delay variation.  That doesn't sound like much to me, but I checked the Phase Equalization box anyway and let it do its thing.  It ended up with 0.04 ns group delay variation (with about 5-10 dB less stopband attenuation).  Now, I don't have a good feel for how much variation is too much; any ideas?

TIA (Thanks In Advance)

I'm not a fan of "wizards", so condition my answers accordingly.

1: Are you using a set filter length?  For similar passband flatness and stopband attenuation, your filter needs to get proportionally longer as you decrease the bandwidth.  More or less.  If your BW:Fs ratio is 1:5, then expect to need a filter that's 10 times longer to get similar performance for a BW:Fs ratio of 1:50.  If filters that long end up causing you grief with processor loading, expect to do fancy things like polyphase filtering to combine filtering with downsampling.

2: This surprises me a bit as I would expect that a symmetrical FIR would have a flat group delay.  Someone will correct my wrongness, I'm sure.  Is the wizard generating non-symmetrical filters?

Thanks, Tim.  1: I'm working with hardware with 3 levels of fixed-coefficient halfband filters, followed by up to 128 taps in a programmable coefficient FIR filter.  That's the receive side, and the transmit side is exactly symmetric.  Not exactly my choice to use this particular chip because I inherited this project when I joined Raytheon 3 months ago.  I'm actually an RF guy thrown in with a bunch of software engineers, so naturally I'm doing the DSP, right?!

2: Oh, there is an analog filter before the ADC/after the DAC, so the Wizard may be using the FIR filter to compensate for the nonlinear phase in it.  My best guess.  The HBF's wouldn't have nonlinear phase, would they?

I'm actually an RF guy thrown in with a bunch of software engineers, so naturally I'm doing the DSP, right?!

Of course!  All my formal training is in analog circuit design.  But then I built a radio for my Master's thesis that ended up with more intellectual content in the itty bitty overworked 8-bit processor that I'd originally put in there to run the front panel.

128 stages doesn't sound like enough for a really satisfactory 50:1 Fs to BW ratio.  The duration of the impulse response scales inversely with the bandwidth, and it all has to fit into the number of available samples.  You may be deep into a "can't get there from here" situation.

Can you do any processing after the chip?  Maybe use the chip to come up with a data stream that can be decimated, and then do the rest of the work in a processor?  If you can't, then someone slipped up on the systems engineering.

And no, a half-band filter shouldn't have nonlinear phase -- but I learned long ago that when you're buying products "should" is just a sometimes plaintive expression of a moral imperative, and not always (or often enough) expression of reasonable expectation.

I'm assuming that the wizard uses Parks McLellan at its core.  Which is good if your problem fits the Parks McLellan mold.  In order to shoe-horn your 1:50 filter into the 128 samples, you need to take a close look at your specifications, see where they're really important and where they're not, and relax them as much as you can where they're not -- that'll give you the best shot at getting what you need.

Probably what we will end up doing is using the AD9361's FIR filters when the desired BW is a reasonable fraction of the sample rate and bypass them and use the FPGA to filter when it's not.  That, or lower the sample rate with the BW.  I'm meeting with one of the software engineers this afternoon to discuss which option is less painful.

As far as maximum group delay variation requirements go, one of the systems engineers has spelled out for me what he requires.  At the high sample rate to bandwidth ratios, it exceeded his requirements by at least an order of magnitude.  Another reason to avoid blindly using the wizard.

Thanks, Tim and Rick, for your help!  BTW, I've read some of your white papers here on DSPRelated and elsewhere, and they are very clear and helpful!  Thanks a bunch for putting them out to supplement the dry textbooks that don't always help!

Hi.  You're using some sort of high-powered software to design your filter.  Be aware that the software will design a filter it thinks you "want" rather than the filter you "need."  I also don't like "wizard" software, it has to make too many assumptions because the user is not a filter expert.

If you're really designing a traditional tapped-delay line FIR lowpass filter, it's group delay will be constant and flat over the filter's passband. "Phase equalization" makes no sense with regard to FIR filters.  I suggest you start learning to use MATLAB's firpm() and fir1() FIR filter-design commands.  You'll be glad you did.

If  your desired passband is really 2% of the Fs sample rate, depending on your desired stopband attenuation, your FIR filter could end up requiring over 100 taps (coefficients).  That's a lot of taps!!  Because you desire a very high-performance lowpass filter, you should definitely consider (1) multistage FIR filtering, or (2) "decimation filtering", or perhaps (3) what's called "Interpolated FIR Filters."

Be aware that the software will design a filter it thinks you "want" rather than the filter you "need."

Which is why I don't like wizards...

Thanks, Rick.  Like I replied to Tim above, I didn't have much choice in what hardware and software to use (not that I really am qualified to choose anyway).  Also see my reply about the structure of the hardware and my background and how it maybe doesn't match the task exactly (it would be boring if it did!).

Yes, I will definitely check out firpm() and fir1().  Fortunately we have access to just about every Matlab and Simulink toolbox out there - one of the advantages of working for a larger company.

Well, I might not be able to do multistage FIR's or other fancy stuff, at least not if I keep all the filtering inside the AD9361 chip.  We do have an FPGA connected to it, but the way I understand it, the power and thermal budget was blown when they tried to do the filtering inside it.  So they opted for using the FIR's and HBF's that are built into the AD9361, and I get the headache, er learning experience, of making them work!