Juergen Schuhmacher (@engineer68)
Exactly, the non-matching frequencies do not automatically mean clock domain crossing. We first assume that the information is synchronized. Then a simple 50/41...
More bits might be left away in case assumptions can be made regarding the utilization of the vector width - depending on the problem. Since this is related to FPGA...
Being a musician and involved in music production, I wonder how many lyrics we already have in the market that have been "composed" using such automatic methods....
Looking forward to. According to my understanding this works mainly because of the high oversampling ration(?) - so the output is finally not exactly the same as...
The point about that function is that it can effectively be integrated into DSPs and FPGAs, since one needs only N+1 calculations and can use the values twice....
This is a classic task for a continuous fitting operation. I once wrote a module for this task in C that uses the minimum squares of the deviations and works iteratively....
The question is, what are the 192kHz intended for. Is it to transport higher frequencies like e.g. 80kHz which a 96k signal cannot transport? You will need a ADC...
I had suggested a little FPGA for this but do not know how familiar you are with that. S/PDIF is a piece of cake in there, so is clock recovery and jitter attenuation...
An interesting aspect to mention is also powering, cooling and the situation how a tube is built in which has some relevance according to my investigations. Also...
Hm, such questions populate our German electronics forum 3 times a day. I'm far away from wanting to attack anyone, but on the one hand such questions don't really...
Of course this is possible and often necessary. Like already mentioned the coeffs have to be investigated but also the incoming data. If for instance there is a...
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