Re: Still problems booting the 5402

Started by zhit...@mail.ru in TMS320c54x14 years ago

> > > > Hi > > We have solved the problem. The serial clock has to run before the first > frame sync pulse. We added...

> > > > Hi > > We have solved the problem. The serial clock has to run before the first > frame sync pulse. We added three clock cycles before the fram sync > pulse. > > > wrote: > original article: http://www.egroups.com/group/c54x/?start=72 > > Hi > > > > We have problems bootloading the DSP via the McBsp0 serial port. > > First we had a fault in the He


hello please help me in booting the processor TMS320c542

Started by hem marri in TMS320c54x17 years ago

I have given 16 bit EPROM INTERFACE OPTION to THE TMS320C542 .I am attempting to boot from the 16 bit eprom which is directly...

I have given 16 bit EPROM INTERFACE OPTION to THE TMS320C542 .I am attempting to boot from the 16 bit eprom which is directly interfaced to the processor using some glue logic.I am attempting to boot for the eprom,assuming the reset vector as FF80 as per the document. Ple


Re: Re: Still problems booting the 5402

Started by Jeff Brower in TMS320c54x14 years ago

Denis- > Hello. Jeff. I solved the problem of bootloading. After every word of binary image > i added one clock cicle. It means that there...

Denis- > Hello. Jeff. I solved the problem of bootloading. After every word of binary image > i added one clock cicle. It means that there are 18 clock cicles for every 16-bit > word, taking into account with one bit delay. Ok so 1 bit for framesync, 1 bit delay, for 2 total bits of delay. Thanks very much for the update. -Jeff > > > Denis- Thanks a lot for posting that. I r


Re: Re: Still problems booting the 5402

Started by Jeff Brower in TMS320c54x14 years ago

Denis- > Hello. Jeff. I solved the problem of bootloading. After every word of binary image > i added one clock cicle.It means that there are...

Denis- > Hello. Jeff. I solved the problem of bootloading. After every word of binary image > i added one clock cicle.It means that there are 18 clock cicles for every 16-bit > word, taking into account with one bit delay. Ok so 1 bit for framesync, another bit for delay (2 bits delay total). Thanks very much for the update. -Jeff > > > Denis- Thanks a lot for posting that. I


Data is corrupt after serial boot

Started by erha...@hotmail.com in TMS320c54x12 years ago

Hi, I am booting 5416 using standard serial boot method. My problem is that some part of my code does not work as expected when I boot serially...

Hi, I am booting 5416 using standard serial boot method. My problem is that some part of my code does not work as expected when I boot serially but it works fine when I program the dsp from CCS. There are no problems for the other parts of the code for serial boot case. I realized that when I reset and boot the dsp serially after programming the dsp from ccs without powering off, evrything works ...