Hi, When i am loding code on to the DSK i am getting this error "Trouble Writing Register: Error 0x00000004/-1024 Error during: Register,...

Hi, When i am loding code on to the DSK i am getting this error "Trouble Writing Register: Error 0x00000004/-1024 Error during: Register, PTI_ERR_PREV_IROP_CMD Error Occured at 0x00000000 Sequence ID: 6 Error Code: -1024 Error Class: 0x00000004" I am using CCS 3.1v and DSK c5510A board. What could be the reason for this?? Here is the .cmd file which i am using. -stack ...

Hi Jeff, Very interesting indeed, but I cannot understand one thing, could you help me: > Subject Re: Question: Where is the explicit...

Hi Jeff, Very interesting indeed, but I cannot understand one thing, could you help me: > Subject Re: Question: Where is the explicit parallel execution code in the b > Posted by: "Jeff Brower" j...@signalogic.com jbrower888 > Date: Mon Mar 17, 2008 8:28 am ((PDT)) > > > PS: You can have a look at the 12 rules of parallelism > > in the help files of code composer. Key Word: > > Paral

Carl- > The simulator I'm programming knows the opcodes of > each instruction. The decoder I've built reads every > instruction defined on...

Carl- > The simulator I'm programming knows the opcodes of > each instruction. The decoder I've built reads every > instruction defined on the DSP. I will explain my > doubt with an example. > > Suppose there are 3 instructions: "A", "B" and "C". > "A" has a "parallel enable bit" (E bit) but "B" and > "C" don't. > Suppose "A" and ("B" or "C") can be executed in > parallel thanks to th

i want to put some domain of 5502 into idle state,but it does not work. the following is my...

i want to put some domain of 5502 into idle state,but it does not work. the following is my program: MOV #0x00, PDP MOV #0110101110B,PORT(@ICR) IDLE ;XPORT,CLKGEN,CPU enable,peripherials reside on PERIPH bits MOV #pdpIDLE, PDP MOV #01111111000010B,PORT(@PICR) ;using McBSP IDLE ;misc modele,io,mcbsp,timer0 enable MOV #11B,PORT(@MICR) ;HPI,DMA IDLE after these instructions excut...

Carl- > The simulator executes the decoded instructions > serially, but it needs to know if a previous > instruction, like "repeat" will...

Carl- > The simulator executes the decoded instructions > serially, but it needs to know if a previous > instruction, like "repeat" will affect just the next > instruction or the next two paralleled instructions. I > need to know in advance when there's present > parallelism in order to preserve the behaviour of the > code. > > It's different to execute: > > RPT #3 > MPYM *AR1-, *C

Gary- > I believe your assumptions are incorrect. The whole point of "soft- > parallelism" is to do it at runtime, not compile-time. This...

Gary- > I believe your assumptions are incorrect. The whole point of "soft- > parallelism" is to do it at runtime, not compile-time. This type of > behavior is often seen in pipelined processors, especially those with > multiple execution pipelines. Does TI documentation support your comments? Is there a specific SPRU-number or other doc that indicates run-time decisions? I'm dubio

Hi, I'm developing a TMS320C55x functional simulatior through a tool called ArchC, in order to get my B.Sc. in Electrical Engineering....

Hi, I'm developing a TMS320C55x functional simulatior through a tool called ArchC, in order to get my B.Sc. in Electrical Engineering. Right now, I have issues to identify user defined parallel instructions ( || ). As far as I understand it is at compile time when parallelism is determined (implicit or explicit), so in the COFF file or the HEX I should find the code that tells the DS...

Hi all, i have been working on FILE I/O operation in C55x and CCS v3.1 and faced the problem with the fgetc and fputc. When i use the fputc...

Hi all, i have been working on FILE I/O operation in C55x and CCS v3.1 and faced the problem with the fgetc and fputc. When i use the fputc it returns "-1". But whn i creat a project with small functionality thn the code works fine. Can anyone help in knowing wat could be the problem. Thanks a lot in advance, Regards, -Prassi Check Out Industry's First Single-Chip, Multi-Format, ...

Hai I am trying to service my McBSP request for Inter-DSP Communication .If anyone could comment on pls do immediately With Regard's...

Hai I am trying to service my McBSP request for Inter-DSP Communication .If anyone could comment on pls do immediately With Regard's Aruna.S.R D&E-SDG **************** CAUTION - Disclaimer *****************This email may contain confidential and privileged material for the sole use of the intended recipient(s). Any review, use, retention, distribution or disclosure by others is stric...

Hello Christian, Iam sure, this is quite late from the time you have posted this query, but were you able to find a solution for your...

Hello Christian, Iam sure, this is quite late from the time you have posted this query, but were you able to find a solution for your issue? I guess, ARn used in such addressing modes, by default include XAR as well. However, i would like to know, if there is something i missed to understand. Would be good to understand, more on the issue and the solution. Thanks, Gayathri Hello: ...