Error while connecting to a BF533 board
I have a problem with a BF533 EZ-KIT lite board. When I try connect my
VisualDSP++ to the board, I receive the following error:
Core fault detected before halt at address: 0xFFEFEEE0. Attempting
to reset processor.
Core fault detected before halt at address: 0xFFEFEEE0.
Unable to halt processor, JTAG communication failed. Possible error
at address: 0xFFEFEEE0.
Core fault detected before halt at address: 0xFFEFEEE0. Attempting
to reset processor.
Core fault detected before halt at address: 0xFFEFEEE0.
Unable to halt processor, JTAG communication failed. Possible error
at address: 0xFFEFEEE0.
Could not halt after reset
Warning: External memory is disabled for this region of memory.
Is there someone that faced such a problem?
Any help/hint will be very appreciated.
Note tat the PC and VisualDSP++ works ok if connected to another BF533
EZ-KIT LITE board
Also, recheck the target setting and platform setting and your connection type.
Good morning
>I have a problem with a BF533 EZ-KIT lite board. When I try connect my
>VisualDSP++ to the board, I receive the following error:
>
> Core fault detected before halt at address: 0xFFEFEEE0. Attempting
>to reset processor.
> Core fault detected before halt at address: 0xFFEFEEE0.
> Unable to halt processor, JTAG communication failed. Possible error
>at address: 0xFFEFEEE0.
> Core fault detected before halt at address: 0xFFEFEEE0. Attempting
>to reset processor.
> Core fault detected before halt at address: 0xFFEFEEE0.
> Unable to halt processor, JTAG communication failed. Possible error
>at address: 0xFFEFEEE0.
> Could not halt after reset
> Warning: External memory is disabled for this region of memory.
>
>Is there someone that faced such a problem?
>Any help/hint will be very appreciated.
>Note tat the PC and VisualDSP++ works ok if connected to another BF533
>EZ-KIT LITE board
especially the connection to the PC. Sounds like it's just dead.
Patience, persistence, truth,
Dr. mike
On Fri, 20 Apr 2007, g...@yahoo.it wrote:
> Good morning
> I have a problem with a BF533 EZ-KIT lite board. When I try connect my
> VisualDSP++ to the board, I receive the following error:
>
> Core fault detected before halt at address: 0xFFEFEEE0. Attempting
> to reset processor.
> Core fault detected before halt at address: 0xFFEFEEE0.
> Unable to halt processor, JTAG communication failed. Possible error
> at address: 0xFFEFEEE0.
> Core fault detected before halt at address: 0xFFEFEEE0. Attempting
> to reset processor.
> Core fault detected before halt at address: 0xFFEFEEE0.
> Unable to halt processor, JTAG communication failed. Possible error
> at address: 0xFFEFEEE0.
> Could not halt after reset
> Warning: External memory is disabled for this region of memory.
>
> Is there someone that faced such a problem?
> Any help/hint will be very appreciated.
> Note tat the PC and VisualDSP++ works ok if connected to another BF533
> EZ-KIT LITE board
If I correctly understood your help, I checked all the switch and set
them on their default value.
However this doesn't solve the problem.
Thanks for your help,
Giovanni
naresh patel wrote:
type="cite">Check for Default setting of EZ-kit
"g...@yahoo.it" <g...@yahoo.it>
wrote:
style="border-left: 2px solid rgb(16, 16, 255); padding-left: 5px; margin-left: 5px;">
I have a problem with a BF533 EZ-KIT lite board. When I try connect my
VisualDSP++ to the board, I receive the following error:
Core fault detected before halt at address: 0xFFEFEEE0. Attempting
to reset processor.
Core fault detected before halt at address: 0xFFEFEEE0.
Unable to halt processor, JTAG communication failed. Possible error
at address: 0xFFEFEEE0.
Core fault detected before halt at address: 0xFFEFEEE0. Attempting
to reset processor.
Core fault detected before halt at address: 0xFFEFEEE0.
Unable to halt processor, JTAG communication failed. Possible error
at address: 0xFFEFEEE0.
Could not halt after reset
Warning: External memory is disabled for this region of memory.
Is there someone that faced such a problem?
Any help/hint will be very appreciated.
Note tat the PC and VisualDSP++ works ok if connected to another BF533
EZ-KIT LITE board
& cheers........., upto getting tears in your eyes"
Ahhh...imagining that irresistible "new car" smell?
Check out
href="http://us.rd.yahoo.com/evtH245/*http://autos.yahoo.com/new_cars.html;_ylc=X3oDMTE1YW1jcXJ2BF9TAzk3MTA3MDc2BHNlYwNtYWlsdGFncwRzbGsDbmV3LWNhcnM-">new
cars at Yahoo! Autos.
__._,_.___
">http://www.dsprelated.com/groups/adsp/1.php
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__,_._,___
Hi I have a full license for VisualDSP++.
The target settings seems ok, since everything works fine with another
theoretically identical board.
Gio
v...@yahoo.com wrote:
I think you have to install your KIT License properly (90 days
evaluation period).
Also, recheck the target setting and platform setting and your
connection type.
Good morning
>I have a problem with a BF533 EZ-KIT lite board. When I try connect
my
>VisualDSP++ to the board, I receive the following error:
>
> Core fault detected before halt at address: 0xFFEFEEE0. Attempting
>to reset processor.
> Core fault detected before halt at address: 0xFFEFEEE0.
> Unable to halt processor, JTAG communication failed. Possible
error
>at address: 0xFFEFEEE0.
> Core fault detected before halt at address: 0xFFEFEEE0. Attempting
>to reset processor.
> Core fault detected before halt at address: 0xFFEFEEE0.
> Unable to halt processor, JTAG communication failed. Possible
error
>at address: 0xFFEFEEE0.
> Could not halt after reset
> Warning: External memory is disabled for this region of memory.
>
>Is there someone that faced such a problem?
>Any help/hint will be very appreciated.
>Note tat the PC and VisualDSP++ works ok if connected to another
BF533
>EZ-KIT LITE board
>
>
__._,_.___
">http://www.dsprelated.com/groups/adsp/1.php
_____________________________________
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__,_._,___
Did you try flashing an application into the boot flash device? If that
operation went wrong or if you have bad code and you have the switch
settings set to do a wide Flash Boot, then it could be that it is doing
something bad that prevents the ICE from connecting. Try setting the
switches for a SPI slave boot, reset the target, and try connecting again.
Cheers,
George
www.kaztek.com
_____
From: a... [mailto:a...] On Behalf Of
g...@yahoo.it
Sent: Sunday, April 22, 2007 5:57 AM
To: v...@yahoo.com
Cc: a...
Subject: Re: [adsp] Re: Error while connecting to a BF533 board
Hi I have a full license for VisualDSP++.
The target settings seems ok, since everything works fine with another
theoretically identical board.
Gio
vinay_chiniwar@ yahoo.com wrote:
I think you have to install your KIT License properly (90 days evaluation
period).
Also, recheck the target setting and platform setting and your connection
type.
Good morning
>I have a problem with a BF533 EZ-KIT lite board. When I try connect my
>VisualDSP++ to the board, I receive the following error:
>
> Core fault detected before halt at address: 0xFFEFEEE0. Attempting
>to reset processor.
> Core fault detected before halt at address: 0xFFEFEEE0.
> Unable to halt processor, JTAG communication failed. Possible error
>at address: 0xFFEFEEE0.
> Core fault detected before halt at address: 0xFFEFEEE0. Attempting
>to reset processor.
> Core fault detected before halt at address: 0xFFEFEEE0.
> Unable to halt processor, JTAG communication failed. Possible error
>at address: 0xFFEFEEE0.
> Could not halt after reset
> Warning: External memory is disabled for this region of memory.
>
>Is there someone that faced such a problem?
>Any help/hint will be very appreciated.
>Note tat the PC and VisualDSP++ works ok if connected to another BF533
>EZ-KIT LITE board
You are right, you solved my problem, thanks a lot.
I forgot to specify this Flash related concern to the newsgroup :-)
Giovanni
George Kadziolka wrote:
cite="mid:!&!AAAAAAAAAAAYAAAAAAAAAHLuPyR5ckxNuUaNnLYdyajCgAAAEAAAAJuEDeA907FKo67WLPdbpV8BAAAAAA==@kaztek.com"
type="cite">
style="font-size: 10pt; font-family: Arial; color: navy;">Hi,
style="font-size: 10pt; font-family: Arial; color: navy;">
style="font-size: 10pt; font-family: Arial; color: navy;">Did you try
flashing an application into
the boot flash device? If that operation went wrong or if you have bad
code
and you have the switch settings set to do a wide Flash Boot, then it
could be
that it is doing something bad that prevents the ICE from connecting.
Try
setting the switches for a SPI slave boot, reset the target, and try
connecting
again.
style="font-size: 10pt; font-family: Arial; color: navy;">
style="font-size: 10pt; font-family: Arial; color: navy;">Cheers,
style="font-size: 10pt; font-family: Arial; color: navy;">
style="font-size: 10pt; font-family: Arial; color: navy;">George
style="font-size: 10pt; font-family: Arial; color: navy;">
style="font-size: 10pt; font-family: Arial; color: navy;"> moz-do-not-send="true" href="http://www.kaztek.com/">www.kaztek.com
style="font-size: 10pt; font-family: Arial; color: navy;">
style="font-size: 10pt; font-family: Arial; color: navy;">
style="font-size: 10pt; font-family: Tahoma; font-weight:
bold;">From:
face="Tahoma" size="2">
style="font-size: 10pt; font-family: Tahoma;"> a...
[mailto:a...] On
Behalf Of g...@yahoo.it
Sent: Sunday, April
22, 2007 5:57
AM
To:
v...@yahoo.com
Cc:
a...
Subject: Re: [adsp]
Re: Error
while connecting to a BF533 board
style="font-size: 12pt;">
style="font-size: 12pt;">Hi I have
a full license for VisualDSP++.
The target settings seems ok, since everything works fine with another
theoretically identical board.
Gio
vinay_chiniwar@yahoo.com
wrote:
cite="mid:E...@vps.dsprelated.com" type="cite">
style="font-size: 12pt;">I think
you have to install your KIT License properly (90 days evaluation
period).
Also, recheck the target setting and platform setting and your
connection type.
Good morning
>I have a problem with a BF533 EZ-KIT lite board.
When I try connect
my
>VisualDSP++ to the board, I receive the following
error:
>
> Core fault detected before halt at address: 0xFFEFEEE0. Attempting
>to reset processor.
> Core fault detected before halt at address: 0xFFEFEEE0.
> Unable to halt processor, JTAG communication failed. Possible
error
>at address: 0xFFEFEEE0.
> Core fault detected before halt at address: 0xFFEFEEE0. Attempting
>to reset processor.
> Core fault detected before halt at address: 0xFFEFEEE0.
> Unable to halt processor, JTAG communication failed. Possible
error
>at address: 0xFFEFEEE0.
> Could not halt after reset
> Warning: External memory is disabled for this region of memory.
>
>Is there someone that faced such a problem?
>Any help/hint will be very appreciated.
>Note tat the PC and VisualDSP++ works ok if connected to another
BF533
>EZ-KIT LITE board
>
>
style="font-size: 12pt;">
size="3">
__._,_.___
">http://www.dsprelated.com/groups/adsp/1.php
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__,_._,___
I got the same error, different HW ("External memory is disabled for this region of memory")
This happened when I tried to load me program to my target board, trough an ICE.
The same program worked fine on my Ez-Kit537. The target board has the same SDRAM as the EZ-Kit and the same flash.
What do you meen by "flashing an application"?
Could this be the same problem??
Thanks,
Daphna
Hi,
>
>Did you try flashing an application into the boot flash device? If that
>operation went wrong or if you have bad code and you have the switch
>settings set to do a wide Flash Boot, then it could be that it is doing
>something bad that prevents the ICE from connecting. Try setting the
>switches for a SPI slave boot, reset the target, and try connecting again.
>
>Cheers,
>
>George
>
>www.kaztek.com
>
> _____
>
>From: a... [mailto:a...] On Behalf Of
>g...@yahoo.it
>Sent: Sunday, April 22, 2007 5:57 AM
>To: v...@yahoo.com
>Cc: a...
>Subject: Re: [adsp] Re: Error while connecting to a BF533 board
>
>Hi I have a full license for VisualDSP++.
>The target settings seems ok, since everything works fine with another
>theoretically identical board.
>Gio
>
>vinay_chiniwar@ yahoo.com wrote:
>
>I think you have to install your KIT License properly (90 days evaluation
>period).
>Also, recheck the target setting and platform setting and your connection
>type.
>
>Good morning
>> I have a problem with a BF533 EZ-KIT lite board. When I try connect my
>> VisualDSP++ to the board, I receive the following error:
>>
>> Core fault detected before halt at address: 0xFFEFEEE0. Attempting
>> to reset processor.
>> Core fault detected before halt at address: 0xFFEFEEE0.
>> Unable to halt processor, JTAG communication failed. Possible error
>> at address: 0xFFEFEEE0.
>> Core fault detected before halt at address: 0xFFEFEEE0. Attempting
>> to reset processor.
>> Core fault detected before halt at address: 0xFFEFEEE0.
>> Unable to halt processor, JTAG communication failed. Possible error
>> at address: 0xFFEFEEE0.
>> Could not halt after reset
>> Warning: External memory is disabled for this region of memory.
>>
>> Is there someone that faced such a problem?
>> Any help/hint will be very appreciated.
>> Note tat the PC and VisualDSP++ works ok if connected to another BF533
>> EZ-KIT LITE board
I assume that when you say 'target board' that you mean some custom BF537
board, with the same SDRAM/Flash as on the EZKIT.
"Flashing an application" was referring to getting the boot image file into
the boot flash device. You would typically use the Flash Programmer Utility
with VDSP++ and an ICE to get your application flashed in. See the ADI
documentation for more info on the Flash Programmer Utility. If you can
connect easily to the target, then you would have a different problem that
the other one I addressed.
There is a hardware option (ie when connecting to an EZIT or target through
an ICE) to use the XML reset values. This will initialize the SDRAM
controller registers with values suitable for the EZKIT through the ICE
connection. This feature is designed to let you load code/data into SDRAM
from a VDSP++ debug session. Otherwise, if you are creating a boot image
file because now you want to see if it runs by itself on the target, you
would need to use an init block (ie a small app that runs during the boot
process) to setup the SDRAM controller.
One reason for the message you are seeing could be that you are connecting
via the ICE and are not using the XML reset values. If this is the case,
the SDRAM controller is not operating and that region of memory is not
available.
Hope this helps.
Cheers,
George
www.kaztek.com
_____
From: a... [mailto:a...] On Behalf Of
d...@yahoo.com
Sent: Tuesday, May 01, 2007 8:26 AM
To: a...
Subject: [adsp] RE: Re: Error while connecting to a BF533 board
Hi
I got the same error, different HW ("External memory is disabled for this
region of memory")
This happened when I tried to load me program to my target board, trough an
ICE.
The same program worked fine on my Ez-Kit537. The target board has the same
SDRAM as the EZ-Kit and the same flash.
What do you meen by "flashing an application"?
Could this be the same problem??
Thanks,
Daphna
Hi,
>
>Did you try flashing an application into the boot flash device? If that
>operation went wrong or if you have bad code and you have the switch
>settings set to do a wide Flash Boot, then it could be that it is doing
>something bad that prevents the ICE from connecting. Try setting the
>switches for a SPI slave boot, reset the target, and try connecting again.
>
>Cheers,
>
>George
>
>www.kaztek.com
>
> _____
>
>From: a...@yahoogroups. com
[mailto:a...@yahoogroups. com] On Behalf Of
>g...@yahoo.it
>Sent: Sunday, April 22, 2007 5:57 AM
>To: v...@yahoo.com
>Cc: a...@yahoogroups. com
>Subject: Re: [adsp] Re: Error while connecting to a BF533 board
>
>Hi I have a full license for VisualDSP++.
>The target settings seems ok, since everything works fine with another
>theoretically identical board.
>Gio
>
>vinay_chiniwar@ yahoo.com wrote:
>
>I think you have to install your KIT License properly (90 days evaluation
>period).
>Also, recheck the target setting and platform setting and your connection
>type.
>
>Good morning
>> I have a problem with a BF533 EZ-KIT lite board. When I try connect my
>> VisualDSP++ to the board, I receive the following error:
>>
>> Core fault detected before halt at address: 0xFFEFEEE0. Attempting
>> to reset processor.
>> Core fault detected before halt at address: 0xFFEFEEE0.
>> Unable to halt processor, JTAG communication failed. Possible error
>> at address: 0xFFEFEEE0.
>> Core fault detected before halt at address: 0xFFEFEEE0. Attempting
>> to reset processor.
>> Core fault detected before halt at address: 0xFFEFEEE0.
>> Unable to halt processor, JTAG communication failed. Possible error
>> at address: 0xFFEFEEE0.
>> Could not halt after reset
>> Warning: External memory is disabled for this region of memory.
>>
>> Is there someone that faced such a problem?
>> Any help/hint will be very appreciated.
>> Note tat the PC and VisualDSP++ works ok if connected to another BF533
>> EZ-KIT LITE board