a problem in IO Boot mode
I have designed a board using TMS320VC5402 DSP. I will
using IO Boot Mode for loading my code to internal RAM.
In my hardware:
- PIN - Station
-All CVdd - 1.8V
-All CVss - GND
-All DVSS - GND
-All DVdd - 3.3V
-RS,NMI,INT0~3 - pull up to vcc(3.3v) by RK
-EMU0,EMU1 - pull up to vcc(3.3v) by RK
-BIO,READY,D0 - pull up to vcc(3.3v) by RK
-MP/MC, - GND
-X1,X2/CLKIN - Tying to 12MHZ cristal by C"PF to GND
-CLKMD1~3 - CLKMD1=VCC ,CLKMD1=GND
- - ,CLKMD1=VCC(DIV 1/4 CLOCK MODE) -
-other pins - not conect
In this board we have clock in CLKOUT Pin that is good.
According to SPRA618.pdf,after reset:
Once the bootloader is initiated, it performs a series of
checking operations to determine which boot mode to use
(Figure 1 of spra618).
The flowchart shown in Figure 1 illustrates XF Pin is low
but in my board XF Pin is high.
Why dose not DSP execute bootload operation.
Please help me in hardware.
Please reply back if you have some suggestion for the
benyamin salah b_salah2004@b_sa...