effects of variable sampling rate on spectrum of a signal

On 4/15/2011 12:02 AM, Mitja Nemec wrote:
> Hi guys
>
> I have a repetitive action controller which is generating/controlling
> signal with 1024 sampling points/intervals in one period of
> fundamental harmonic. The frequency of fundamental harmonic is
> somewhere between 40 Hz and 70 Hz. No mater what the frequency of
> fundamental signal is I always have 1024 sampling points/intervals in
> order to get good results from FFT/DFT (no spectral leakage, no
> windowing �).
> The required frequency resolution is better than 0.01Hz. The whole
> system is based on MCU which runs at 100 MHz. A sampling period can
> only be integer multiple of MCU clock period. Thus with constant
> sampling period I can generate only a few fundamentals between 40Hz
> and 70 Hz.
> (e.g. with MCU timer value of 1953 I get fundamental period of 100 MHz/
> (1953*1024) =50.00320 Hz,
> but with timer value of 1952 I get fundamental period of 50.02882)
>
> For all the rest I use the trick (probably well known) of variable
> sampling frequency. But variable in the sense that I switch just
> between two MCU timer values within one period of fundamental. (e.g.
> to get fundamental frequency of 50.0160Hz I'd have 50%(512) of
> sampling intervals 1053 MCU cycles long and the rest 50% would be 1052
> MCU cycles long)
>
> My system works fine and I am completely satisfied with it. But as I
> am curious here are my questions:
> 1.	Does this trick have a name?
> 2.	Is there any literature on this trick that you can point me to?
> (Please be aware that I am more of a power electronics guy than DSP).
> I've tried searching "variable sampling" and similar phrases, but
> mostly I get research where variable means variable in much wider
> range than mine.
> 3.	I suspect if I'd look close enough I'd see that my 50.016 Hz from
> above example is probably 50.02882 and 50.00320. But somehow I don't
> believe that is all. What additional frequencies can I expect using
> this scheme?
>
> Best regards, Mitja Nemec

Mitja,

It's good to hear that your system is working well - even though folks 
have found lots of remarks to make and questions to ask.

We really *don't* know enough about what you're trying to do nor how 
you're doing it to make better comments.  Questions that come up:

- How do you decide when to switch sampling frequencies?

- How do you know that it's "working well"?

I rather suspect that while the system is working well that there are 
artifacts of the approach that defy the measures you're taking.  You may 
not be getting what you expect - although it seems good enough.

So, please allow me to encourage you to help us understand the bigger 
picture.  Then we might be able to comment further.

I agree that "sample rate dithering" is about as close a name that makes 
sense for further research.  It would be interesting to know where else 
your particular approach has been used.  References?

Fred

On Apr 16, 12:34&#4294967295;am, Tim Wescott <t...@seemywebsite.com> wrote:
> On 04/15/2011 03:22 PM, Jerry Avins wrote:
>
> > On Apr 15, 1:02 pm, Tim Wescott<t...@seemywebsite.com> &#4294967295;wrote:
>
> > &#4294967295; &#4294967295;...
>
> >> Note that if you really truly need to get 0.01Hz frequency resolution
> >> out of your system, then your whole premise is moot: for that
> >> resolution, you need to gather a sample that's at least 100 seconds
> >> long. &#4294967295;Further, it's that huge sample that needs to be an integer number
> >> of cycles of your fundamental, not each bit inside the fundamental
> >> (unless the frequency of your fundamental changes too fast).
>
> > Note that if he worries about frequencies like 50.0160Hz, he better
> > look carefully at the accuracy of his crystal.
>
> Why didn't I notice that?

Begause you were too busy picking a fight?

Rune

(snip)

Thanks for all the comments and especially for the nomenclature. I
really appreciate your help and comments.

I hoped that I was clear enough, though clearly I do need some
practice how to describe my system (and English is not my primary
language �weak excuse I know).

Before I begin with description of my system I should say that at the
moment only relative frequency accuracy is required. I am aware that
achieving absolute accuracy some $ and thought (which in the end
translates to $) will have to be put in accurate clock source.

I have a MCU, which controls the power stage (full bridge, with LC
filter at the output) which generates voltage. Frequency, amplitude
and harmonic content are controlled by MCU. For the sake of this
discussion let's limit the reference voltage to first harmonic only.
The primary goal is to generate voltage with very low deviation (THD
in case of first harmonic only) in steady state from the reference
value, regardless of load current. Note that transient response is not
a factor, and once in steady state the load current does not change.
Because of this I chose repetitive action controller (where each
period has the same number of samples and error at sample #43 in
previous period is used for corrective action at sample #43 in this
period, or more specifically if number of samples per period is 1024,
output of the controller at instant n depends only on error at instant
n-1024). As the device is also generating reference value there is no
need to lock onto the signal (I am inherently locked on the signal).
The requirements of repetitive action controller limit the system in
the way that the number of samples per period must be constant.
Otherwise the performance of the controller (output voltage shape)
falls dramatically.

It is the frequency of the reference (and output voltage) signal, that
must be relatively accurate to 0.01Hz. And it must be adjustable, so
picking a correct crystal (e.g. 10.24MHz or similar) and going with
correct multiple is not really an option. Though supplying the MCU
with variable clock out from a fractional divider is an interesting
idea for the next revision of HW/SW.

The dithering of the sampling clock is already in place (I did not
mention it as I wanted to keep the explanation simple) and basically
looks like this. Every sampling interval I calculate the length of the
next sampling interval in MCU clock cycles. Then I add to it remainder
calculated in previous sampling interval (read on) and I round it to
integer. The difference between rounded integer and un-rounded value
is the remainder and is stored for next sampling period. So if
sampling interval should be 1952 and 1/3, the sequence of length of
sampling intervals would look like 1952, 1952, 1953, 1952, 1952,
1953, ... with remainder values 1/3, 2/3, 0, 1/3, 2/3, 0, ...

The FFT I do in the system is only a FFT of a load current and I need
only first and higher harmonics of it so FFT out of one period is good
enough for my purposes (mainly monitoring the THD of the current and
not really measuring it, thus I can afford to be sloppy).

As said the system works fine at the moment and the main reason for my
post is so that I could get some background on what I am actually
doing. I know that some of you might have a problem with the idea that
some might take a tool without knowing any background and then using
it. I must say that I am also not ecstatic about it, but I am not in
the position to say to the boss "we can probably do this, just let me
read extensively on the subject for a month and then I can get to do
actual work" (actual for boss, I consider education and thinking about
problems also part of the work). So here I am with some spare time
trying to delve deeper into theory behind my work.

Again thanks for support and all the comments

Mitja Nemec

On Apr 18, 9:39&#4294967295;am, Mitja Nemec <kore...@yahoo.co.uk> wrote:

> ... or more specifically if number of samples per period is 1024,

As I said before, this is where you make the mistake. Despite
views that are often aired in this forum, one can never design
a practical system with such criteria in mind: One designe a
system with *some* sample rate (subject to some degree of jitter),
and the signal is *quasi* periodic to within *some* accuracy one
does not know.

From there on one needs to cope with these imperfections and
inaccuracies as best one can. Hence the talk about windowing
and so on.

Rune

On Apr 18, 6:23&#4294967295;pm, Rune Allnor <all...@tele.ntnu.no> wrote:
> On Apr 18, 9:39&#4294967295;am, Mitja Nemec <kore...@yahoo.co.uk> wrote:
>
> > ... or more specifically if number of samples per period is 1024,
>
> As I said before, this is where you make the mistake. Despite
> views that are often aired in this forum, one can never design
> a practical system with such criteria in mind: One designe a
> system with *some* sample rate (subject to some degree of jitter),
> and the signal is *quasi* periodic to within *some* accuracy one
> does not know.
>
> From there on one needs to cope with these imperfections and
> inaccuracies as best one can. Hence the talk about windowing
> and so on.
>
> Rune

Just to make sure as I am not sure I got my point across. Are you
saying that even when I generate a signal within a device (e.g. from a
1024 point sine table) the signal is not periodic? I might accept that
in real life thing are never ideal, but they can come close enough.
Furthermore the signal might not be periodic, but it will certainly
appear periodic to the device that generates it, right?

Mitja

On 04/18/2011 03:23 AM, Rune Allnor wrote:
> On Apr 18, 9:39 am, Mitja Nemec<kore...@yahoo.co.uk>  wrote:
>
>> ... or more specifically if number of samples per period is 1024,
>
> As I said before, this is where you make the mistake. Despite
> views that are often aired in this forum, one can never design
> a practical system with such criteria in mind: One designe a
> system with *some* sample rate (subject to some degree of jitter),
> and the signal is *quasi* periodic to within *some* accuracy one
> does not know.

Rune, you are _not_ being clear, and given that you didn't answer my 
previous query for expansion on this it's rather frustrating.

What's the matter with 1024 samples, as long as the sampling rate is 
sufficient for his lowest frequency of excitation?  The magic is obvious 
-- it's 2^10.  But I see no anti-magic here to prevent it from being _a_ 
right, if not _THE_ right answer.

I also question the "does not know" -- how do you know that the OP does 
not know the accuracy if his quasi-periodic assumption?  And if that's 
your beef, why didn't you expand on this when queried before?

Just saying "that's not going to work", and not even responding to 
requests for more information with "neener" isn't very helpful.

>  From there on one needs to cope with these imperfections and
> inaccuracies as best one can. Hence the talk about windowing
> and so on.

For this, I don't see that windowing is necessary.  If the primary 
effects that you're dealing with are cyclic, then using the information 
gained from prior cycles to correct following ones is perfectly valid.

-- 

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com

Do you need to implement control loops in software?
"Applied Control Theory for Embedded Systems" was written for you.
See details at http://www.wescottdesign.com/actfes/actfes.html

Mitja Nemec wrote:

> (snip)
> 
> Thanks for all the comments and especially for the nomenclature. I
> really appreciate your help and comments.

You do weird things in the weird way.
There is no need for FFT, 1024 samples, and dithering mumbo jumbo.
First, generate the fundamental and all harmonics of interest by means 
of the DDS. Convert to PWM as needed. Find the THD by multiplying your 
output to harmonics. Minimize the THD by adjusting the harmonics. That 
doesn't take much of the processing and memory. A 8-bit microcontroller 
is sufficient. BTW, I've done exactly that with Atmel AVR.


Vladimir Vassilevsky
DSP and Mixed Signal Design Consultant
http://www.abvolt.com

On 04/18/2011 12:39 AM, Mitja Nemec wrote:
> (snip)
>
> Thanks for all the comments and especially for the nomenclature. I
> really appreciate your help and comments.
>
> I hoped that I was clear enough, though clearly I do need some
> practice how to describe my system (and English is not my primary
> language �weak excuse I know).

This is my first clue.  There's nothing wrong with your written English.

> Before I begin with description of my system I should say that at the
> moment only relative frequency accuracy is required. I am aware that
> achieving absolute accuracy some $ and thought (which in the end
> translates to $) will have to be put in accurate clock source.
>
> I have a MCU, which controls the power stage (full bridge, with LC
> filter at the output) which generates voltage. Frequency, amplitude
> and harmonic content are controlled by MCU. For the sake of this
> discussion let's limit the reference voltage to first harmonic only.
> The primary goal is to generate voltage with very low deviation (THD
> in case of first harmonic only) in steady state from the reference
> value, regardless of load current. Note that transient response is not
> a factor, and once in steady state the load current does not change.
> Because of this I chose repetitive action controller (where each
> period has the same number of samples and error at sample #43 in
> previous period is used for corrective action at sample #43 in this
> period, or more specifically if number of samples per period is 1024,
> output of the controller at instant n depends only on error at instant
> n-1024). As the device is also generating reference value there is no
> need to lock onto the signal (I am inherently locked on the signal).
> The requirements of repetitive action controller limit the system in
> the way that the number of samples per period must be constant.
> Otherwise the performance of the controller (output voltage shape)
> falls dramatically.
>
> It is the frequency of the reference (and output voltage) signal, that
> must be relatively accurate to 0.01Hz. And it must be adjustable, so
> picking a correct crystal (e.g. 10.24MHz or similar) and going with
> correct multiple is not really an option. Though supplying the MCU
> with variable clock out from a fractional divider is an interesting
> idea for the next revision of HW/SW.
>
> The dithering of the sampling clock is already in place (I did not
> mention it as I wanted to keep the explanation simple) and basically
> looks like this. Every sampling interval I calculate the length of the
> next sampling interval in MCU clock cycles. Then I add to it remainder
> calculated in previous sampling interval (read on) and I round it to
> integer. The difference between rounded integer and un-rounded value
> is the remainder and is stored for next sampling period. So if
> sampling interval should be 1952 and 1/3, the sequence of length of
> sampling intervals would look like 1952, 1952, 1953, 1952, 1952,
> 1953, ... with remainder values 1/3, 2/3, 0, 1/3, 2/3, 0, ...
>
> The FFT I do in the system is only a FFT of a load current and I need
> only first and higher harmonics of it so FFT out of one period is good
> enough for my purposes (mainly monitoring the THD of the current and
> not really measuring it, thus I can afford to be sloppy).
>
> As said the system works fine at the moment and the main reason for my
> post is so that I could get some background on what I am actually
> doing. I know that some of you might have a problem with the idea that
> some might take a tool without knowing any background and then using
> it. I must say that I am also not ecstatic about it, but I am not in
> the position to say to the boss "we can probably do this, just let me
> read extensively on the subject for a month and then I can get to do
> actual work" (actual for boss, I consider education and thinking about
> problems also part of the work). So here I am with some spare time
> trying to delve deeper into theory behind my work.

Given that your goal is to use information from prior cycles to correct 
the current one, I'm not sure that you want to use an FFT at all -- if 
what you want is a voltage to be generated with some specific periodic 
waveform, then you should be able to do this using purely time-domain 
methods.

Linguistic note: This isn't an English thing, it's a DSP thing.  In 
engineering usage at least, the "n'th" harmonic of a sine wave is the 
one where x(t) = sin(n * 2 * pi * f) -- so the fundamental is your 1st 
harmonic, twice the fundamental is your second harmonic, DC is the 
zero'th harmonic. etc.

-- 

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com

Do you need to implement control loops in software?
"Applied Control Theory for Embedded Systems" was written for you.
See details at http://www.wescottdesign.com/actfes/actfes.html

Mitja,

I don't see *anything* wrong with your English.  So, let's concentrate 
on the system description - because it's still not all that clear to me. 
  So, I'll now wade through the rather lengthy description you've given 
- with comments and questions interspersed below:

On 4/18/2011 12:39 AM, Mitja Nemec wrote:
> (snip)
...... only relative frequency accuracy is required. .......

>
> MCU, which controls the power stage (full bridge, with LC
> filter at the output) which generates voltage. Frequency, amplitude
> and harmonic content are controlled by MCU.

***OK

>For the sake of this
> discussion let's limit the reference voltage to first harmonic only.
> The primary goal is to generate voltage with very low deviation (THD
> in case of first harmonic only) in steady state from the reference
> value, regardless of load current.

***Perhaps language here: Of course you apply a THD measurement to a 
sinusoid (usually the fundamental).  The "first harmonic" might be 
confused with the "second harmonic of the fundamental" - but I take it 
you mean THD of the fundamental frequency.  And, just to be clear, any 
THD measurement must include the harmonics and not only the fundamental 
.. in the sense of measuring it.  You likely know this so I'm being picky.

>I chose repetitive action controller (where each
> period has the same number of samples and error at sample #43 in
> previous period is used for corrective action at sample #43 in this
> period, or more specifically if number of samples per period is 1024,
> output of the controller at instant n depends only on error at instant
> n-1024).

***Now, this really confuses me.  Here's my paraphrasing back:
- I generate a sinusoid in the MCU using an internal clock and (as 
later) a sine table which generates 1024 sinusoidal samples.
- I have (abritrarily?) chosen the 43rd sample to use as a reference 
point for measuring (cycle-by-cycle?) error.
- On the 43rd sample, I compare [something I don't know what!!] with 
[something else I don't know what] to generate an error.
I guess my problem here is that I don't see the difference between the 
MCU output and the "output of the controller".

>As the device is also generating reference value there is no
> need to lock onto the signal (I am inherently locked on the signal).

***If it is inherently locked to the signal then why the feedback 
mechanism at all?

> The requirements of repetitive action controller limit the system in
> the way that the number of samples per period must be constant.
> Otherwise the performance of the controller (output voltage shape)
> falls dramatically.

Hmmm... I don't know the term "repetitive action controller" so I found 
this which sounds pretty close to what you're describing:

http://www.ufsm.br/gepoc/publicacoes/congressos/New%20Repetitive%20Control%20System%20of%20PWM%20Inverters.pdf

Ah!  "Repetitive Controlled PWM Inverters"  Is that the term you're 
looking for?

Fred

On Apr 18, 7:06=A0pm, Tim Wescott <t...@seemywebsite.com> wrote:
> On 04/18/2011 03:23 AM, Rune Allnor wrote:
>
> > On Apr 18, 9:39 am, Mitja Nemec<kore...@yahoo.co.uk> =A0wrote:
>
> >> ... or more specifically if number of samples per period is 1024,
>
> > As I said before, this is where you make the mistake. Despite
> > views that are often aired in this forum, one can never design
> > a practical system with such criteria in mind: One designe a
> > system with *some* sample rate (subject to some degree of jitter),
> > and the signal is *quasi* periodic to within *some* accuracy one
> > does not know.
>
> Rune, you are _not_ being clear, and given that you didn't answer my
> previous query for expansion on this it's rather frustrating.

*Somebody* is not being clear; I suspect it's the OP.

> What's the matter with 1024 samples, as long as the sampling rate is
> sufficient for his lowest frequency of excitation? =A0

Who was talking about excitation? In the first post there was
talk about 'I don't want to use windows and I am worrying about
spectral leakage.' None of that has to do with exciatation.
It has to do with PSD measurements.

Rune