Rounding off problems in IIR filters

Hi,

I am relatively new to this DSP field. I've explained my problem below
and please bear with me incase the question or my observation is
absurd.

Let me explain clearly what am I doing and what is the problem. The
filter design was done using Matlab. Once I got the coefficients, I
had to take it inside my DSP as a fixed point number. So, I had to
find out a scaling factor for that. I found out the scaling factor
using the following relation,

max(coefft) * 2^s <= 2^(M-1)

where max(coefft) is the maximum value of the filter coefficients, s
is the scaling factor and M is the number of bits I want my
coefficents to be. Since I use signed arithmetic, it becomes M-1.
Currently I've designed for M = 16. I am using TMS320F2812, it has 32
bit accumulator and every memory location is 16 bits wide. My input to
the filter is 12 bits and the coefficients will be 16 bits. Filter
implemented is a second order IIR high pass filter. The DAC which
converts the filter output to analog is a 16 bit DAC.

Inside the DSP, I make use of the scaled filter coefficients, that is,
I take the coefficients inside like this, say, b0 = round(b00*2^s)
where b00 is the coefficent as obtained from the Matlab. Then the
output is computed using the equation,

y(n) = b0x(n) + b1x(n-1) + b2x(n-2) - a1y(n-1) - a2y(n-2)

Finally, once I get y(n), I do a right shift of s bits as I've
multiplied the coefficents by 2^s when I took them inside the DSP.
This right shift of the output always does a "floor"ing operation.
This flooring operation works fine if the filter input is positive,
works fine in the sense the difference between the expected output and
the floored output ( say delta ) is minimum. For negative inputs,
delta is too high. (This fact I verified using Matlab also. I gave
positive and negative inputs to the filter and observed the expected
output and the floored output. )

On the other hand, "ceil"ing of the final filter output( for negative
input values) seems to provide a better response, that is delta here
again is minimum. But I dunno how to do a ceil operation in my DSP. My
code is written completely in assembly language, so it would be better
if someone could guide me how to do this in assembly.

Any help in this regard is highly appreciated. Thanks.

Kalki

kalki wrote:

> Hi,
> 
> I am relatively new to this DSP field. I've explained my problem below
> and please bear with me incase the question or my observation is
> absurd.

Not absurd, but common enough for dealing with it to be a standard
technique, and for DSP chips to have hardware that facilitates the
solution.

   ...
> Any help in this regard is highly appreciated. Thanks.

Are you familiar with what is known as Q format? You need to be. The
bits in your computers can represent integers and text characters. They
can also represent fractions. Q format does that. There are integer
multiply and fractional multiply instructions. They use the same
multiplier hardware, but return different parts of the double-precision
result. From Mathworks:
http://www.mathworks.com/access/helpdesk/help/toolbox/tic2000/2using_5.html
 From Randy Yates: http://home.earthlink.net/~yatescr/fp.pdf

   ...

Familiarize yourself with one or both and find your processor's support
for fixed-point (or whatever it's called) operations. The way to do what
you want may then become clear. If it doesn't, you will at least have
the vocabulary you need to understand an answer you get here.

Jerry
-- 
... the worst possible design that just meets the specification - almost
a definition of practical engineering.                     .. Chris Bore
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