Reg CANStressDR--Help need plz
Can anybody tell how to creat the Line Fault
conditions on the CAN bus using the vector tool CANStressDR.
I think any one who has an experience using this tool
can help me
I want to create the Line Faults on the CAN bus using
the Resistor and Capacitor circuit that is available with the
CANStressDRtool. I read the Manual of the tool but i still have some
confusion how to create the test conditions for Line faults on the
CAN bus using the Analog Disturbance ciruit.
i want to simulate some following conditions like
1. Disturbing the CAN_H and CAN_L voltages
2. Simulating the CAN_H or CAN_L wire breaks etc..
and my CAN bus is a high speed bus with 500Kb/sec
any kind of help can be very uself to me